The smallest vias are 0.25 mm (finished) on 1.57 mm thick boards, so the aspect ratio should not be a concern. Since I posted this, I have learned that the boards are >2 years old (!) and thus may have moisture that is forcing out any residual solder in the holes during reflow. I’m pretty certain we’ll find that baking the boards makes this problem go away.

Meanwhile, the plant is updating their shelf-life policies and procedures….

Todd



From: grandrien [mailto:[log in to unmask]]
Sent: Sunday, April 07, 2013 5:01 AM
To: TechNet E-Mail Forum; MacFadden, Todd
Subject: re: [TN] Solder Stencil Interference due to Unintentional Via Fill

First time I heard about such issue. Could you precise the diameter of the vias ?
rgds
========================================
Message du 04/04/13 17:58
De : "MacFadden, Todd"
A : [log in to unmask]<mailto:[log in to unmask]>
Copie à :
Objet : [TN] Solder Stencil Interference due to Unintentional Via Fill

Hi everyone,

We are encountering some problems with HASL (SnPb) boards where many vias are coming in filled or partially-filled with solder. In some cases the solder protrudes enough to interfere with the SMT solder stencil process. The plant checked 10 incoming bare boards and all 10 had at least a few vias filled with solder protruding enough to cause problems.

I don't see anything in IPC-600 that would disqualify this condition. We don't specifically state in our drawing that closed vias are not allowed, but is there a standard that governs via fill/protrusions from the HASL finish?

Thanks for any insight.

Todd

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