Hi,
I recently did a thin (.5mm thick), thermally conductive 4 layer PCB design
using a DPAK device. I actually ended up with about 1C/Watt. I had a large
number of 12 mil via space in a staggered pattern at 30mils between columns
and rows. I could pump 20 watts though this DPAK FET easily. The vias were a
big part of the thermal conductivity. This was an aluminum backed PCB where
the .5mm PCB was bonded to a 1mm thick plate. Plus the vias were filled with
thermally conductive epoxy.
See: www.kondner.com/files/vias.jpg
Reflow problems with TCE mismatch was another problem but thermal
conductivity was great!
From reading literature you want a large number of very small vias for best
conductivity.
Bob K.
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Roger Mack
Sent: Friday, February 22, 2013 4:03 PM
To: [log in to unmask]
Subject: Re: [TN] 48-pin QFN via-in-pad solder slug problem.
I agree, solid copper cooling pad should be the end result. Epoxy filled
vias underneath will usually be sufficient, more expensive copper fill may
be possible. Talk to your board supplier for help.
Roger Mack P.Eng.
Manufacturing Specialist
Parker Hannifin Canada
Electronic Controls Division
1305 Clarence Avenue
Winnipeg, MB R3T 1T4 Canada
direct 204 453 3339 x373
[log in to unmask]
www.parker.com/ecd
From:
"Nowland, Russell Howard (Russell)" <[log in to unmask]>
To:
<[log in to unmask]>
Date:
02-22-2013 02:49 PM
Subject:
Re: [TN] 48-pin QFN via-in-pad solder slug problem.
Sent by:
TechNet <[log in to unmask]>
Alan,
Here is my two cents worth. You do not want to cap the vias with
soldermask. If you must filling the via, copper is the best or epoxy is
another option. You would have to talk to your PWB supplier to see what
they have to offer. BUT, first I would suggest changing you stencil
design. The intent being to keep the solder from draining to the hole. So
you will design the stencil per the IPC 7525 guidelines with a 20-50%
reduction. I would look at doing a pattern that cover the holes but
retains at least 50% of the paste coverage. I am sure your stencil
provider can help. If they cannot I can suggest contacting Bill Coleman
at Photo Stencil. I know they can help you. He is on the Technet but he
probably just returning from APEX.
RUSSELL NOWLAND
ALCATEL-LUCENT
REPAIR STRATEGY & SUPPLIER MANAGEMENT
14000 Quail Spring Parkway, Suite 100
Oklahoma City, OK 73134
T: +1 405 302 1660
F: +1 405 302 1622
M: +1 405 203 0034
[log in to unmask]
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Alan Young
Sent: Friday, February 22, 2013 11:23 AM
To: [log in to unmask]
Subject: Re: [TN] 48-pin QFN via-in-pad solder slug problem.
Hi folks,
Please forgive me if this topic does not belong to this group.
Let me explain my predicament.
I'm a PCB layout guy who has been asked to look at a soldering issue we
are having with a 48-pin QFN 7mmx7mm [EMBER CORP - EM357-RTR], the solder
slug under the part is not soldering/bonding to the PCB. The pcb footprint
is made per the manufactures specification with a 5.3mm x 5.3mm solder
slug pad with 9 vias finished drill size of 0.254mm. There are no
soldermask features on the component or solder side over the vias.
When the board has been reflowed, all of the 48 pins solder well but the
slug has not bonded to the pcb. There are signs of solder in the slug vias
on the opposite side of the board. If the part is ripped off the board,
the slug is clean and solder free.
I do not have any information about the paste screen setup or the oven
profile.
The questions I have are;
1 - Any ideas on why this is happening?
2 - Are the vias in the slug causing this problem?
3 - Would soldermaks capping the vias on the component side help resolve
this?
4 - Would plugging (no capping) of the vias with epoxy help?
5 - Do north African sparrows fly faster then European sparrows (just
seeing if anybody is reading this :-)
I do have some photos and x-rays of the device if this will help.
Again any help or comments would be greatly appreciated.
Regards,
Alan Young.
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