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January 2013

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Subject:
From:
"Scott A. Bowles" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, [log in to unmask]
Date:
Tue, 8 Jan 2013 13:27:02 -0500
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R. Saravan,

It sounds like you are talking about the thermal stress test performed by the bare board manufacturer and if so the first paragraph below in the response I posted on January 2 to a different question you asked should answer your question.

-----Original Message-----
From: Bowles, Scott @ SSG - PE - FOS 
Sent: Wednesday, January 02, 2013 9:29 AM
To: TechNet E-Mail Forum; Ramakrishnan Saravanan
Subject: RE: [TN] reliability test for PCBs

It depends if you are trying to test against a standard for PTH structural integrity to determine if the boards will withstand multiple thermal cycles through assembly, rework or repair or if you are trying to test more for long-term reliability against end-use thermal cycles.  The industry standard at the bare board manufacturer level is to perform one thermal stress so you can flow down to your supplier to perform thermal stress testing per IPC-6012 section 3.6.1.1 IAW IPC-TM-650, Method 2.6.8, test Condition "A" (288C for 10 seconds) per the number of cycles you deem appropriate for your assembly process, e.g., double-sided SMT (2), PTH components (1), rework (2), maybe five cycles.  Your printed board suppliers should be capable of performing this test for you.

If you are also or more concerned with PTH structural integrity surviving end-use requirements then you could specify Thermal Shock as Joyce suggested but you don't randomly use -55 to 150C, you need to specify a test condition per Table 1 of IPC-TM-650, Method 2.6.7.2, based on material type.  This test is considered a special requirement per Table 4-3 of IPC-6012 and will probably have to be performed by an independent test lab, not done by bare printed board supplier (extra time and cost).  You also probably need to flow down the requirement to have the board supplier to ensure to add test coupon "D" to the manufacturing panels for this test.

Regards,

Scott A. Bowles
Staff Engineer - Printed Circuit Designer IV
Engineering Services
L3 Fuzing & Ordnance Systems
3975 McMann Rd.
Cincinnati, OH 45245
Office: 513-943-2483
Mobile: 513-208-9009

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-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Ramakrishnan Saravanan
Sent: Tuesday, January 01, 2013 11:10 AM
To: [log in to unmask]
Subject: Re: [TN] reliability test for PCBs

Dear all, 

The test method 2.4.13.1 specifies  test method that is designed to determine the thermal integrity of unclad or metallic clad laminates using short-term solder exposure. My interest is to find the toughest know standard for PTH integrity. regards,


R.Saravanan


-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Ramakrishnan Saravanan
Sent: Tuesday, January 08, 2013 12:08 PM
To: [log in to unmask]
Subject: [TN] 3 dip test

Dear all ,

We are making MLBs for high reliability applications. 

Some users of our PCB asking us to do 3 dip test ( 3 x 280 deg C Solder dip). 

Is this test can be traced to any standard ?. 

regards,

R.Saravanan

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