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December 2012

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Subject:
From:
Reuven Rokah <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Reuven Rokah <[log in to unmask]>
Date:
Thu, 6 Dec 2012 18:01:56 +0200
Content-Type:
text/plain
Parts/Attachments:
text/plain (95 lines)
Hi,

It seems, the via holes also have metal residues,
[image: Inline image 1]

On Wed, Dec 5, 2012 at 6:49 PM, Steve Gregory <
[log in to unmask]> wrote:

> Hi Mordechai,
>
> I have not seen anything like this before. I’ve posted your pictures so
> everyone else can see:
>
> http://stevezeva.homestead.com/Pad_Wrinkle.jpg
>
> http://stevezeva.homestead.com/Via_Xsection.jpg
>
> Could you share what the overall stack-up of this board was supposed to be
> and what prepreg thickness was used?
>
> Steve
>
> From: Mordechai Kirshenbaum
> Sent: Tuesday, December 04, 2012 3:16 PM
> To: [log in to unmask]
> Subject: A PCB defect that is not specified by IPC
>
>
> Hi Steve
>
> On routine visual inspection of an income PCB board we found a type of the
> defect
> that is not specified in any of the IPC standards (e.g  IPC-A-600
> Acceptability of Printed Boards).
>
> It looks like  wrinkles on  pads  and conductors (see fig 1 in the
> attached file). We suspected that it was caused
> by thick copper conductor on the second layer (under the outer layer).
>
> We measured the copper and the dielectric thickness between the outer and
> the second layers
> and found that the copper thickness on the 2nd layer was relatively high
> (70 micro-meter), and the
> dielectric thickness lower than specified (only 50 microns).
>
> Have you seen similar defect?
> What is the reliability impact?
> Is it acceptable for class 3?
>
> Best regards
> Mordechai Kirshenbaum
> MOD, Israel
>
> P.S. please feel free to post this question on the technet forum.
>
>
>
>
>
>
>
>
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*Reuven Rokah*

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