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November 2012

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Subject:
From:
Guy Ramsey <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Guy Ramsey <[log in to unmask]>
Date:
Thu, 8 Nov 2012 06:47:54 -0500
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True, but what about the process that produced that amount of residue. I
would hate to rely on inspection to sort that out.  I would not trust the
resulting solder connections either. 

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of David D. Hillman
Sent: Wednesday, November 07, 2012 6:31 PM
To: [log in to unmask]
Subject: Re: [TN] Limits on flux residue

Hi Wayne - that is a ridiculous volume of flux and I doubt that any
specification requirement could prevent this condition as it should be
common sense that this volume of flux is not acceptable. Then again, common
sense doesn't seem to be as common as it used to be. I would be very
uncomfortable with an assembler who would knowingly send me an assembly with
this condition. Hopefully this was just a mistake that slipped thru
inspection/audit.

Dave



From:   "Thayer, Wayne - IS" <[log in to unmask]>
To:     <[log in to unmask]>
Date:   11/07/2012 07:37 AM
Subject:        Re: [TN] Limits on flux residue
Sent by:        TechNet <[log in to unmask]>



Thanks to all for initial comments.  I finally got some pictures so we can
appreciate the magnitude of what I've brought up.

http://ipc-technet.groupsite.com/gallery/24561

Are we using the IPC photo gallery anymore?  The last collection before I
added these pix was about a year ago!  Has Steve totally stolen their
market?

As the photos show, this is an extreme case, and yes, I don't see how this
could have been done without rework being involved, but even then I don't
know how so much flux was jammed beneath this part.  For removal, the device
was rudely milled/bludgeoned to death with a milling machine, and then I
picked at it with an Xacto until I felt real comfortable with what was going
on.  I removed a good size chunk of the flux towards the left side of the
photos, so the approximately 60% fill seen now is lower than how this board
was shipped to me.  So the original "void ratio" was better than void ratios
in solder for most QFN center pads!

I think IPC 610 should have a picture in it similar to the ones I've
submitted as an example of a rejectable defect under all classes.

Wayne Thayer

From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Tuesday, November 06, 2012 8:27 AM
To: TechNet E-Mail Forum; Thayer, Wayne - IS
Subject: Re: [TN] Limits on flux residue

Hi Wayne - no, the JSTD-001 committee has not addressed that aspect of No
Clean processing because there are a number of product use environment
influences and process parameters that come into play on what is acceptable
and unacceptable. Your description would lead me to believe that someone has
taken extreme liberty in calling something a "no clean" 
process. One of the things that we have found most interesting in the
implementation of a no clean process for a couple of our products is that
many folks believe "no clean" is a sloppy process and you can leave flux
residue anywhere on the assembly in uncontrolled quantities. But the reality
is that "no clean" solder processing requires very careful control of
what/how much/where you allow flux residues to exist. In my view, a "no
clean" process actually is a much tighter controlled process than a process
that utilizes cleaning to insure that product functionality is not impacted.

Dave Hillman
Rockwell Collins
[log in to unmask]<mailto:[log in to unmask]>



From:        "Thayer, Wayne - IS" <[log in to unmask]<
mailto:[log in to unmask]>>
To:        <[log in to unmask]<mailto:[log in to unmask]>>
Date:        11/05/2012 05:52 PM
Subject:        [TN] Limits on flux residue
Sent by:        TechNet <[log in to unmask]<mailto:[log in to unmask]>>
________________________________



Is there a spec somewhere which limits the amount of residue allowed for no
clean processing?  I just saw a board where a BGA was about 70%
"underfilled" by flux residue.  No, this was not a flux/underfill product! 
 A quick look at JSTD-001 Section 8 didn't seem to have specific guidance on
this condition.

Wayne Thayer

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