Jack-
Remember that the assembly strategy will also affect what you want to keep for space between boards & around the edges. If these boards are going to be hand assembled, then it's no problem to strip off the edges & tabs to the final board shape before stuffing on the parts. On the other hand, if you are looking to utilize automated assembly processes, then there will be a strip of space on 2 edges where the board is riding the rails of the assembly machine - creating areas that cannot be populated by machine. This area is typically .25 inches on each side.
A great graphic for these assembly issues can be found at: http://www.meccompanies.com/white_paper1.html
Thanks,
Joe
Joe Morrison
ICESTORM Engineering Program Manager
Lockheed Martin MS2
1801 State Route 17C
Owego, NY 13827
607-751-7921
607-751-3621 (fax)
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-----Original Message-----
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of Jack Olson
Sent: Wednesday, October 31, 2012 12:37 PM
To: [log in to unmask]
Subject: EXTERNAL: Re: [DC] FAB: panelization sanity check
Thanks for the response.
The reason I don't want to work with a specific supplier is that we want
this to be universal
for any supplier to build anytime in the next 20 years.
(Assume we were trying to develop a company standard for a particular type
of products, but
we don't know who is going to build it.)
Anyway, I downloaded a program called KwickFit, which is a super-easy way
to look at different
options, (free 30-day trial, no registration required) but I noticed it
defaults to 18x24 (don't know
why I was thinking 12x18, brain freeze?) but it also defaults to .65
tooling area all around.
Now I'm wondering how safe that is...
thanks again,
Jack
On Wed, Oct 31, 2012 at 10:44 AM, James Jackson <[log in to unmask]> wrote:
> Jack,
>
> Your math and assumptions are in line with mine... although I usually use
> 0.090" for the router bit (not sure why).
>
> I have also - for some reason - understood that the 1.00" clearance on all
> four edges is only really necessary on two edges. So that would mean that
> you
> can go to a size of 10x17 or 11x16 - or somesuch. The reason for the 1-inch
> clearance is for the fabrication houses machine that needs to grip the
> panels
> during production(?). At least... that's the way I understood it... I'm
> probably wrong.
>
> I like your thinking on trying to get the most boards per panel.
>
> Regards,
>
> James Jackson
> Oztronics
>
>
> Quoting Jack Olson <[log in to unmask]>:
>
> > Greetings,
> >
> > This is a very basic question, but I'm trying to design a board size that
> > will get the most yield out of a standard 12 x 18 fabrication panel. It's
> > a
> > 6-layer rectangle with nothing fancy (8/8, 12mil holes, ENIG), but we
> want
> > routed (not v-scored in this case) and we want 6 boards per panel.
> >
> > So I have always used the guideline of 1 inch clear all around the panel
> > edge, (10 x 16 to working space), and 100mil between boards for routing,
> > so
> > I am looking at something like 4.95" x 5.26", right?
> >
> > But in this case even 50mils extra would help me, so I'm wondering how
> > much
> > I can push the envelope and still have it manufacturable by ANY competent
> > supplier.
> >
> > Can two of the panel edges be less than 1 inch?
> >
> > Do I have ANY wiggle room?
> >
> > Jack (aka "the new guy")
> >
> >
> > ______________________________________________________________________
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