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September 2012

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Subject:
From:
Joyce Koo <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Joyce Koo <[log in to unmask]>
Date:
Tue, 18 Sep 2012 14:50:08 +0000
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Your ess test will tell you.  

Joyce Koo
Materials Researcher - Materials Interconnect Lab
Research In Motion Limited
Office: (519) 888-7465 79945
Mobile: (226) 220-4760


-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Vargas, Stephen M
Sent: Tuesday, September 18, 2012 10:06 AM
To: [log in to unmask]
Subject: [TN] Board Flatness

All:

    We have a Class 3 SMT 11" x 14" x .093" PCB where we are seeing board bow and twist just below the acceptable limits of IPC-A-600 (.75%). My concern is that the assembly will be bonded to a metal plate in its final stage and has multiple 2225 ceramic chip capacitors soldered to it. Might these capacitors exhibit cracking or solder joint failures during ESS testing?

   My initial thought was to attempt to reduce the amount of bow and twist by following IPC-7721 for PCB Bow and Twist Repair, but this document appears to be geared for boards with Tg temperatures below 125 degrees C. This board's particular material is per IPC-4101/41 - Tg at 250 degrees C or greater. I'm interested in getting feedback concerning clamping/baking/cooling at such a high temperature. Thanks.

Regards,
Steve Vargas


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