Richard,
From the paper presented at APEX2011 by NPL the diffusion of water vapor is
blocked by copper.
At one point they show a 20 x 20 cm section of clad laminate takes 45 days
at 125C to reach 20% on initial moisture levels.
If you can get access to this take a look and let me know what you think.
If it is correct then via thermal patterns could be very important when
connecting to planes as these will permit vapor to defuse out the laminate.
Bob K.
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Stadem, Richard D.
Sent: Friday, September 21, 2012 7:08 PM
To: [log in to unmask]
Subject: Re: [TN] R: [TN] Bake time for boards with multiple solid copper
planes
Hi, Bob
I have performed bake studies on literally hundreds of PWBs, all kinds and
types, including copper-inver-copper (did that one with Werner Engelmaier in
1989 at Honeywell), most of the slash-sheet numbers, polyimide, standard
FR-4, PEN flex, polyimide flex, and even ceramic substrates. I have done
bake studies on little itty bitty PWBs individually, and as part of a larger
panel. Even silicon chips. Especially silicon chips and wafers.
I have yet to see a PWB that, when saturated at a given humidity level, even
outside of a humidity chamber, did not lose a significant percentage of its
"saturated weight" within a few hours, whether that saturation was purposely
induced within a chamber or simply allowed to come to equilibrium with the
naturally occurring humidity in the atmosphere.
Even a huge FR-4 CCA that is 40" wide, 38" high, .5" thick, with 48 layers
of copper, filled vias and plated shut with copper slugs, will lose LOTS of
water when baked in just 12 hours. The CTE of this PWB was such that its
overall dimension would shrink a full .38" in width when baked at 105 deg.
C., which had nothing to do with water loss, of course.
What I was especially amazed by was the amount of water a silicon chip will
absorb. You would not think a piece of glass could add 10% of its dry total
weight in water less than 8 hours later in a 40%RH atmosphere.
________________________________________
From: TechNet [[log in to unmask]] on behalf of Robert Kondner
[[log in to unmask]]
Sent: Friday, September 21, 2012 4:19 PM
To: [log in to unmask]
Subject: Re: [TN] R: [TN] Bake time for boards with multiple solid copper
planes
Gabriele,
Thank you, I did start looking and reading.
Problem is the bake out time for a 10cm square of a laminated with copper
coated top and bottom is something like 2 years. (From the NRL video.)
Seems like copper is impenetrable by water vapor. I would assume water in
absorbed by the laminate during the manufacturing process so it will exist
between solid copper planes. And filling the vias probably makes it even
worse.
Have not been able to verify any of this yet, it was only through the NPL
link that I came to this conclusion.
If vias are tied to plane using thermal reliefs, and not flooded, then that
makes a board "Bake-able" as vapor can escape.
Any thoughts from anyone would be appreciated.
Bob K.
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of SALA GABRIELE
Sent: Friday, September 21, 2012 3:32 PM
To: [log in to unmask]
Subject: [TN] R: [TN] Bake time for boards with multiple solid copper planes
Hi Bob,
suggestion, read (and study):
IPC-1601 Printed Board Handling and Storage Guideline
http://www.ipc.org/TOC/IPC-1601.pdf (abstract)
see chapters
3.4 Baking for Moisture Removal
3.4.1 Problems Caused By Baking
3.4.2 Baking Environment
3.4.3 Baking Considerations
3.4.4 Establishing Baking Profiles
Ecc....
Also take a look to Test Method IPC-TM-650 2-6-28 (free download), useful
TM that will help you to better assess what it means moisture entrapped in
laminate and how to remove it totally, or partially according to your
specifications.
Moisture Content and/or Moisture Absorption Rate, (Bulk) Printed Board
http://www.ipc.org/4.0_Knowledge/4.1_Standards/test/2-6_2-6-28.pdf
by experience, in the past, to bake-off PCB from 16 Layers up to 28 L and
more, after about 14-18 months of shelf, even if well packed, we use to bake
them at 115°C for 16 h, some time 18 h or 24 h, depending of thickness,
size and weight and a general assessment about % of resin content versus
fiber-glass (construction and stake-up +Copper content).
Some time, to protect of OSP finish, we use to blow N2 inside the ventilated
Oven
Important: no need to remove all the moisture entrapped, but just the enough
MAMC (Maximum Acceptable Amount Content).
Other suggestion, when staking PCB inside oven, pile them up at a maximum
height of 25 mm ( 1 inch), in such way the vapour flows out easily.
Have a good luck
Gabriele
-----Messaggio originale-----
Da: TechNet [mailto:[log in to unmask]] Per conto di Robert Kondner
Inviato: venerdì 21 settembre 2012 19.04
A: [log in to unmask]
Oggetto: [TN] Bake time for boards with multiple solid copper planes
Hi,
Can anyone point me to a document that describes how moisture can be driven
out of internal PCB layers if solid copper layers exist above and below
internal layers?
When routing PCB connections to internal layers, say GND for example, you
want to tie together multiple GND plane layers. But unless a thermal
connection is provided I see no way for moisture to escape from internal
layers.
Using thermal vias breaks up GND planes so it is common to flood vias.
Question:
Do flooded vias to multiple layers raise problems with bake out?
Bob K
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