Well, of course solder will not go away, nor will SMT assembly.
Neither the reliability issues presented by lead-free
 solder usage nor dirty tin mining
are basic reasons for their future decline in electronic manufacturing.

But as solder joint spacings are forced below 1/4th mm by lead density in the <20 nM
IC lithography era,
 how will we be able to screen and reflow the old way?

Intel's BBUL pointed one direction to the future, in my opinion. 
It was motivated by the fragility of low K dielectric layers as well as need for higher density
That was over 10 years ago when 65 nM litho was on the horizon.

Features included laser drilled vias and copper plated connections to IC lands, no solder balls.Those are precisely how embedded chips, passive and active, are assembled.

The possible impllications for electronic manufacring might be examined.  They might include resurrection of MCMs, now called SPs. Fab and assembly would be merged.
There are lots of possibilities.  Should we not begin to explore them?

 
] Bumpless Build-Up Layer PackagingAdobe PDFBumpless Build-Up Layer Packaging Steven N. Towle, Henning Braunisch, Chuan Hu, Richard D. Emery, and Gilroy J. Vandentop Intel Corporation Components Researchwww.sigrity.com/papers/asme

It 

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