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June 2012

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Subject:
From:
Joyce Koo <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Joyce Koo <[log in to unmask]>
Date:
Fri, 1 Jun 2012 19:15:56 +0000
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Is it on cut-off edges on the board with finest feature (or most difficult soldering feature on your product)? 

Joyce Koo
Materials Researcher - Materials Interconnect Lab
Research In Motion Limited
Office: (519) 888-7465 79945
Mobile: (226) 220-4760


-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Louis Hart
Sent: Friday, June 01, 2012 3:10 PM
To: [log in to unmask]
Subject: [TN] pad surface analysis

TechNetters,  surface solderability of a batch of boards has been questioned by a customer. J-STD-003 solderability testing before the boards were shipped, and again, on spare coupons, after receipt by the customer was unremarkable, i.e., everything passed.

In that context, I am wondering what analytical tools are suitable for analyzing a surface for possible contaminants or residue, in particular those which might inhibit soldering. Some searches of the archives since 28 Feb 2012 turned up no postings relating solderability and surface analysis.

Thanks for any information or comments.

Louis Hart
Compunetics
Monroeville, PA
USA
[log in to unmask]<mailto:[log in to unmask]>
412-858-1232


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