TECHNET Archives

June 2012

TechNet@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
Ed Popeielarski <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Ed Popeielarski <[log in to unmask]>
Date:
Fri, 29 Jun 2012 16:51:33 +0000
Content-Type:
text/plain
Parts/Attachments:
text/plain (33 lines)
Greetings 'netters,

For the past 2 1/2 years I've been lurking because Technet didn't get along with my employer's email system (specifically during maintenance).

I solved that problem by finding another employer! See how much you guys mean to me?!

It's good to be "back in the saddle again", so please allow me to begin with a perplexing question:

I need to solve QFN ground-pad voiding on a 0.038" thick ENIG assembly. The application is a high power RF amp and voiding as low as 25% causes issues with reliability.

Many attempts to resolve this with stencil variations, (thickness, star patterns, etc) and process variables (reflow time/temps) have been fruitless.

I'm considering re-spinning the board with a via dead center of this 6mm part, print & reflow only the leads, then wave solder the via (SAC305 with water soluble flux) in hopes of forcing the volatiles out from the center due to the wetting forces. Has anyone tried and succeeded with this method or am I sailing off the edge of the planet?

Thanks for your help in advance.


Ed Popielarski
Engineering Manager

Technical Services, Inc.
970 NE 21st Ct.
Oak Harbor, Wa. 98277

Ph: 360-675-1322
Fx: 206-624-0965
Cl: 949-581-6601

______________________________________________________________________
This email has been scanned by the Symantec Email Security.cloud service.
For more information please contact helpdesk at x2960 or [log in to unmask] 
______________________________________________________________________

ATOM RSS1 RSS2