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June 2012

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From:
"Stadem, Richard D." <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Stadem, Richard D.
Date:
Thu, 21 Jun 2012 15:16:04 -0500
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Well, good question. I was assuming that Shawn needed it to be a certain tolerance due to a high-RF or high impedance circuit, in which case this becomes a critical parameter. But the same could be true of spacing between power and ground or signal lines.

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Smith, Rick
Sent: Thursday, June 21, 2012 3:03 PM
To: [log in to unmask]
Subject: Re: [TN] Etch Factor

Hi Shawn,

Just curious what is the application? It seems that etch factor does not come up unless there is something very critical driving the concern.

Best Regards,
Rick

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Upton, Shawn
Sent: Wednesday, June 20, 2012 11:52 AM
To: [log in to unmask]
Subject: [TN] Etch Factor

Ok, got my specifications, looking at IPC-2221A Figure 10-3, for conductor width (see section 10.1.1 also, pages 77&79); and IPC-A-600H 3.2.1 (see page 86).  It looks like "etch factor" drives how much of a trapezoid one has on any given trace, although outer layers (since they are plated) may have overhang.

What I don't see is any qualitative numbers: ie, an etch factor of y +/-z is typical for outer layers, vs w for inner layers.  Are these numbers variable from vendor to vendor; and have to be called out on any given FAB drawing, since there isn't a generic number to be pointed at?

Shawn Upton, KB1CKT
Test Engineer
Allegro MicroSystems, Inc
[log in to unmask]
603.626.2429/fax: 603.641.5336


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