Have to say I've never seen anything printed on this. I've always
treated it as, the "design needs". 

In general, I avoid flooding discretes and keep at .005in clearance. For
power/analog devices that need it, its anywhere from .025 to .050in
thermal tie (for TO-220/SOT parts) 

Then there's, the engineer REALLY wants it flooded and/or the datasheet
calls for it. Espically useful for heat dissapation.


-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Smith, Rick
Sent: Thursday, March 29, 2012 3:43 PM
To: [log in to unmask]
Subject: [TN] Thermal Relief - SMD Pads - The Devil Made Me Do It

Hi All,

I was looking for an IPC reference describing a thermal relief
pertaining to SMD pads. I could only locate for PTH in IPC-222X.

Anyone aware if there is a standard describing thermal reliefs for SMD
pads? Seems every board I look at have SMD pads buried in the planes.

Thanks Much!

Regards,
Rick

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