The wisdom (Scott Riley) talks...
Both units work just fine all of us are different...
I have the most land patterns in mm. However, some of them I build in mils.
I follow the rule - use the units that are on the component datasheet.
I use the metric padstack for metric land patterns, and "mil" padstack for imperial land patterns.
As long as an origin (0,0) is in the center of footprint, components and via placement are on the grid (as small as 1 mil), neither PWB nor ASSY manufacturer will have problems manufacturing the board as long as their DFM requirements are met.
Because we all (in US) leave by the double standards, I partially adapted IPC-7351 naming convention.
I do not suppress a decimal point on metric padstack - I use an underscore instead.
For example:
0.5mm x 0.5mm will look like this _5x_5
50 mils x 50 mils will look like this 50x50.
I use the double standard for the land pattern name:
Capacitor 0603 will look like this cc0603_capc1608x91usr.
A agree, the names are long, but all (metric and imperial) people are satisfied.
Veronika Anderson C.I.D | Sr. Electrical/Mechanical Designer | Excelitas Technologies
Office: +1 626.967.9521 x 236
1330 East Cypress Street, Covina, CA 91724 USA
[log in to unmask]
www.excelitas.com
-----Original Message-----
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of Scott Riley
Sent: Tuesday, March 20, 2012 8:42 AM
To: [log in to unmask]
Subject: Re: [DC] Updated "Designer's Day" Presentation
Like most of you, I have to smile when following this thread. I have been in
this business for a long time (I'm 50+), and deal with several OEM's and
suppliers for both PCB's and flex circuits. Everyone I deal with has their
own set of standards and terminology and I stopped trying to straighten it
out many years ago. Too many arguments and it seems to go in circles.
The latest designs we're doing are in "microns", the engineers speak in
"mils" during the design review and the FAB drawing must be in "MM" for
their corporate standards. Once you get used to it, it's not that bad.
Regarding footprint vs. land pattern, same thing applies. We try to adapt to
what the customer wants. We have an extensive "footprint library", unless
you want me to send you a land pattern, then we have one of those as well.
Pad vs. land is interesting. I had always been told that a pad had a PTH in
it while a land does not.
-----Original Message-----
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of Tom
Hausherr
Sent: Tuesday, March 20, 2012 11:23 AM
To: [log in to unmask]
Subject: [DC] Updated "Designer's Day" Presentation
All,
Our web-server crashed so you'll have to wait until it comes back on-line.
Nick Ban and our web team are hot on it.
Thanks for the fantastic feedback and excellent dialog. In the IPC world,
Jack Olson & Mike Buetow are correct that the term Footprint is the
component package dimensional data and Land Pattern is what the Footprint
solders to. The term "Land" is what the component lead attaches to. However,
no one uses the term "Land" because all the CAD vendors call it a "Pad".
It's what we deal with every day.
At IPC APEX "Designer's Day" I made an announcement -
"This is my last presentation... that I will ever give using Metric Only
dimensional data in my Power Point files. From now on I will always include
both Metric and Imperial dimensions side by side with Imperial being the
dominant number and (metric) secondary until there is clear evidence that
the industry has successfully transitioned. And I will always use the term
Footprint when referring to PCB library parts because that is the term most
widely used. And I will refer to Chip components using the EIA Imperial
names of 1206, 0805, 0603, 0402 until the component manufacturer's refer to
them using the IPC metric names 3216, 2012, 1608, 1005."
Some of you reported typos in the Power Point Presentation. I updated the
website last night -
http://www.pcblibraries.com/Forum/ipc-apex-expo-2012_topic6.html
The updates also affected the "Proportional Through-hole Padstacks" chart -
Proportional_Through-hole_Padstacks.pdf
<http://www.pcblibraries.com/Forum/uploads/1/Proportional_Through-hole_Padst
acks.pdf> (you can still access this file on our server)
People have been asking me off-line to explain the Proportional Through-hole
Padstacks and I will post the explanation of the mathematical formulas here
(once the server is back on-line) -
http://www.PCBLibraries.com/forum/forum_posts.asp?TID=15
<http://www.PCBLibraries.com/forum/forum_posts.asp?TID=15&PID=60#60>
&PID=60#60
One more thing, PCB Libraries, Inc. is 6 weeks away from launching the 5th
generation IPC Calculator and after hearing your feedback we officially
named it "PCB Footprint Calculator". This is brand new "coded from scratch"
over the past 8 months and the Designer's Day Power Point Presentation is
the blueprint for the new tool. Example: The user can insert the component
dimensions in metric and then switch to mils and all the Footprint
dimensions are converted to 1 mil increments, the Footprint & Padstack names
are generated in Mil units. However, if you stay in metric units, the
Footprint (Land Pattern) dimensions and library name will be in Metric
Units. Example: you enter the component dimensions for a 3216 using metric
dimensions and when you switch to Mils the Footprint name automatically
changes to 1206 and all the Footprint dimensions are in 1 mil increments.
The new tool boosts many new features including rotation to create the IPC,
IEC or EIA Zero Component Orientation. Coming May 1, 2012 when the official
PCB Libraries.com website opens. This is a Free download without any
registration required, it will have regular updates that will have an
auto-update notification and it will come with the Texas Instruments
"Standard Parts" product line which includes over 35,000 TI part numbers.
It's our gift to the electronics industry. No strings attached.
Tom
Tom Hausherr
President
PCB Libraries, Inc.
13730 Sorbonne Court
San Diego, CA 92128
858.592.4826 Office
858.859.5371 Cell
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