This paper might be helpful
Minimum SMT component-to-finished board edge should be 0.200 inch… http://www.avx.com/techinfo_documentdetail.asp?ID=19&Heading=Surface+Mount+Zero+Defect+Design+Check+List&Category=Surface+Mount+Capacitors
John Balchunas
Supplier Quality Engineer
Email: [log in to unmask]
Tel: 763-278-2249
Fax: 763-767-4635
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Blair Hogg
Sent: Tuesday, March 20, 2012 11:45 AM
To: [log in to unmask]
Subject: Re: [TN] Spacing of Capacitors and resistors from PWB edge
We try for about 0.200" or 5mm.
Blair
On Tue, 20 Mar 2012 19:55:54 +0800, prashant chopra <[log in to unmask]> wrote:
>Hi,
>�
>What should be the minimum spacing�of the capacitors and resistors from the PWB edge if V-score routing is used and the depaneling is using the pizza cutter depaneling machine?
>�
>Is there any white paper available on this which recommends the minimum distance from the PWB edge?
>�
>Thanks to all for support.
>�
>Rgds
>Prashant
>
______________________________________________________________________
This email has been scanned by the Symantec Email Security.cloud service.
For more information please contact helpdesk at x2960 or [log in to unmask]
______________________________________________________________________