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February 2012

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Subject:
From:
Guy Ramsey <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Guy Ramsey <[log in to unmask]>
Date:
Thu, 2 Feb 2012 14:48:37 -0500
Content-Type:
text/plain
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text/plain (150 lines)
I agree with Vladimir's observations on IM thickness. But, I think I
remember some white papers on copper thickness dissolution and reliability
concerns with PB-Free wave solder operations. The wave solder problems were
due leaching of the copper knee in PTHs. Wave soldering is not a passive
operation, like paste and reflow.


-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of vladimir Igoshev
Sent: Thursday, February 02, 2012 1:20 PM
To: [log in to unmask]
Subject: Re: [TN] Cu - dissolution and IMC growth rate

Hi Stewart,

Unless a board has EXTREMELY thin Cu pads (few microns, which I've never
heard of) the Cu dissolution (due to solid state diffusion) is irrelevant.

As far as the intermetallic growth is concerned, then there are lot of data
on that.

You most probably don't find any written numbers for a maximum allowed
thickness, as it depends on the conditions a specific assembly will "live"
under and its life time expectancy. I saw flip chips with a layer of
intermetallic as thick as up to 15 microns and the joints were still alive.

I usually tell to all our customers that as long as you see as much as up to
3-5 microns on a Pb-free board you are OK.
Vladimir

SENTEC Testing Laboratory Inc.
11 Canadian Road, Unit 7.
Scarborough, ON M1R 5G1
Tel: (416) 899-1882
Fax: (905) 882-8812
www.sentec.ca

-----Original Message-----
From: Stewart McCracken <[log in to unmask]>
Sender: TechNet <[log in to unmask]>
Date: Thu, 2 Feb 2012 10:11:55
To: <[log in to unmask]>
Reply-To: TechNet E-Mail Forum <[log in to unmask]>,
        Stewart McCracken
	<[log in to unmask]>
Subject: [TN] Cu - dissolution and IMC growth rate

Fellow Technetters,

We are going to be involved in a project this year looking at rates of Cu
dissolution and IMC layer growth during soldering processes (including
rework).
At this stage, I would like to ask the wider community whether anybody has
or knows of "rules of thumb", or published data etc. which describes rates
of dissolution and rates of IMC layer growth?

A little more specifically, based on a SAC305 alloy system, and using an
Immersion Silver or OSP PCB finish, we are looking to develop our
understanding of the following points:

1. IMC growth (microns) for SAC305 solder as a function of time exposure
(seconds) above 230C
2. Cu dissolution (microns) for SAC305 solder as a function of time exposure
(seconds) above 217C
3. Does anyone work to a defined critical threshold (in terms of max IMC
thickness) above which PCB functional integrity is considered to be
undermined?
4. Does anyone work to a defined critical threshold (in terms of min Cu
thickness) below which PCB functional integrity is considered to be
undermined?
5. Are there IPC or other standards covering these items?

I would be extremely grateful for your input, and would be very happy to
share results of the experimental programme which we will undertake later
this year.

Thanks and kind regards,

Stewart

Stewart McCracken
MCS Ltd.
Centre House
Midlothian Innovation Centre
Roslin
Midlothian
EH25 9RE
U.K.

t. +44 (0)131 440 9090
m. +44(0)7711 541735
e. [log in to unmask]
w. www.themcsgroup.co.uk


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