Hi Amol - you should be able to get the paper thru the SMTA website. I
know that SMTA member have free access to the paper, don't know if there
is a nonmember fee. And you are correct, the IPC JSTD 001 criteria is for
"clean" systems and not a mixed metallurgy situation. As you mentioned, a
mixed metallurgy case is a mess on multiple levels - voiding,
intermetallic phase issues, solder joint wetting and microstructure
problems, etc.
Dave
Amol Kane <[log in to unmask]>
01/05/2012 06:48 AM
To
TechNet E-Mail Forum <[log in to unmask]>, "[log in to unmask]"
<[log in to unmask]>
cc
Subject
RE: [TN] Solder voids in BGA balls
Hello Dave,
Happy new near to you and all the technet folks! Is the paper available in
the open domain? Or is there a paid means of obtaining it.
We had a similar situation with a BGA not too long ago, but it was a mixed
technology process (SnPb paste + SAC305 BGA). I am assuming the voiding
limits mentioned in the J-STD are for like technologies, as it can be
almost impossible to get rid of voiding in mixed technologies (depending
upon component mix and overall thermal mass) due to max temp limitations.
Regards,
Amol Kane | Process Engineer
Catalyst Manufacturing Services, Inc.
941 Route 38, Owego NY 13827
Phone: (607) 687-7669 Extn 349 | Website: www.catalystems.com
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of David D. Hillman
Sent: Wednesday, January 04, 2012 9:50 AM
To: [log in to unmask]
Subject: Re: [TN] Solder voids in BGA balls
Hi Wee Mei! We just published our BGA void investigation work at the SMTAI
conference in Fort Worth. The title of the paper is " The Last Will and
Testament of the BGA Void" which was in paper session AAT8. The current
BGA void requirement is "a maximum of 25% of the X-ray image area" per the
IPC-JSTD-001. Despite the rumor mill, that requirement was established by
the IPC JSTD 001 committee based on several data sets submitted by
industry members several years ago. We initiated and completed the recent
investigation as component and solderball sizes have changed considerably
and we wanted to determine if the requirement was still valid. We have
also used our investigation conclusions to form a revised BGA void
criteria proposal to the IPC JSTD 001 committee for their
assessment/review. You stated that you were considering the voids as
"rejectable" on several factors but the industry requirement is 25%
maximum so technically you don't have a basis for that rejection. However,
there is no reason to have that much void activity in a area array device
unless you have a design feature such as a via in pad causing a void
influence. The majority of void issues are due to solder paste problems -
either the condition of the paste or the reflow parameters. I suggest you
pursue two actions - (1) the Process manager needs to
investigate/establish why there are so many voids and present that
technical detail to you for assessment; (2) Pull a copy of the SMTAI paper
and look at the various industry studies that are referenced within it.
Those industry studies can be used to fully understand the various details
of BGA voids, their formation, and how they may be part of your case.
Good Luck.
Dave Hillman
Rockwell Collins
[log in to unmask]
Lum Wee Mei <[log in to unmask]>
Sent by: TechNet <[log in to unmask]>
01/03/2012 07:16 PM
Please respond to
TechNet E-Mail Forum <[log in to unmask]>; Please respond to
Lum Wee Mei <[log in to unmask]>
To
<[log in to unmask]>
cc
Subject
[TN] Solder voids in BGA balls
Dear TechNet Buddies,
My colleague was performing BGA x-ray inspection to 20pcs of the PCBA,
each of them has a BGA on the board. She observed that all the BGA solder
balls have high number of multiple solder voids of various sizes within
each of them. The estimated summation of the solder voids from each ball
ranges from 20 - 25%. As the voids are within the acceptable value of 25%,
process manager wanted QC to consider the workmanship as process
indicator.
My colleague approached me for advice and being a QC, I decided to
consider them as reject base on :
(a) When consulted, Process Manager is not able to determine whether
such extensive solder voids will have any impact on the PCBA reliability.
(b) Though the solder voids size/summation are within the 25%, this
value are observed on every BGA's solder balls, across all the 20 BGAs.
(c) The PCBAs are Class 3 and to be used on mission critical
application.
Before QC decision to reject them was communicated, the process engineer
recall 5 of the PCBA to perform another round of reflow.
Questions :
1. Should the above solder voids workmanship be considered as
"process indicator" or "reject"?
2. Is there disposition for workmanship that is classified as
"process indicator" such as rework or replacement? For me, it should not.
3. Since the process engineer recall 5 of them to perform another
round of reflow, does it not mean he also concur that the workmanship is
not acceptable?
I am a self-learned QC, so any sharing on this matter will be greatly
appreciated.
Thanks and regards,
~wee mei~
______________________________________________________________________
This email has been scanned by the Symantec Email Security.cloud service.
For more information please contact helpdesk at x2960 or [log in to unmask]
______________________________________________________________________
---------------------------------------------------
Technet Mail List provided as a service by IPC using LISTSERV 16.0
To unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF Technet
To temporarily halt or (re-start) delivery of Technet send e-mail to
[log in to unmask]: SET Technet NOMAIL or (MAIL)
To receive ONE mailing per day of all the posts: send e-mail to
[log in to unmask]: SET Technet Digest
Search the archives of previous posts at: http://listserv.ipc.org/archives
For additional information, or contact Keach Sasamori at [log in to unmask] or
847-615-7100 ext.2815
-----------------------------------------------------
______________________________________________________________________
This email has been scanned by the Symantec Email Security.cloud service.
For more information please contact helpdesk at x2960 or [log in to unmask]
______________________________________________________________________
---------------------------------------------------
Technet Mail List provided as a service by IPC using LISTSERV 16.0
To unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF Technet
To temporarily halt or (re-start) delivery of Technet send e-mail to
[log in to unmask]: SET Technet NOMAIL or (MAIL)
To receive ONE mailing per day of all the posts: send e-mail to
[log in to unmask]: SET Technet Digest
Search the archives of previous posts at: http://listserv.ipc.org/archives
For additional information, or contact Keach Sasamori at [log in to unmask] or
847-615-7100 ext.2815
-----------------------------------------------------
______________________________________________________________________
This email has been scanned by the Symantec Email Security.cloud service.
For more information please contact helpdesk at x2960 or [log in to unmask]
______________________________________________________________________
---------------------------------------------------
Technet Mail List provided as a service by IPC using LISTSERV 16.0
To unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF Technet
To temporarily halt or (re-start) delivery of Technet send e-mail to [log in to unmask]: SET Technet NOMAIL or (MAIL)
To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest
Search the archives of previous posts at: http://listserv.ipc.org/archives
For additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815
-----------------------------------------------------
|
