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December 2011

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Subject:
From:
Jim Carlson <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, [log in to unmask]
Date:
Tue, 20 Dec 2011 13:39:47 -0500
Content-Type:
text/plain
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text/plain (136 lines)
Phil,

I would say this is a violation.  You may get away with this condition
if all parts are pasted and reflowed, but get bit if the part is touched
up by hand.  

Kapton tape is a good fix if it doesn't interfere with the stencil.  PWB
spin would be the best scenario.

Jim Carlson 
Quality/Configuration Manager 
L-3 Communications 
Applied Signal & Image Technology 
443-457-1111 Ext. 238


-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Joyce Koo
Sent: Tuesday, December 20, 2011 1:32 PM
To: [log in to unmask]
Subject: Re: [TN] QFP center slug over signal vias

Based on my book, solder mask is not consider as valid dielectric for
signal.  (Kapton tape would be). 

Joyce Koo
Materials Researcher - Materials Interconnect Lab
Research In Motion Limited
Office: (519) 888-7465 79945
Mobile: (226) 220-4760

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Phil Bavaro
Sent: Tuesday, December 20, 2011 1:26 PM
To: [log in to unmask]
Subject: [TN] QFP center slug over signal vias

We found an existing design which has a device (QFP with center slug)
that has too small of a center slug pad on the PWB.  Within the
corresponding area where the center slug pad should have been, the
designer put some signal vias.  Therefore the only thing preventing the
signal via from shorting out to the center slug (ground) is the solder
mask. No failures to date have been reported, even after a 20g vibe
test.

Is this a violation of J-STD-001 or perhaps IPC-2221 -6.3.4 regarding
minimum electrical spacing?  



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