Amol,

What grade (1-3) are you asking for? If you make a equality sign between
artifacts and burrs, then grade 1 accepts no burrs at all.
IPC-610 and its ads is not very clear on this point. We use some thumb rules
that forbids any kind of 'artifacts' for cell phone boards and maximum 2
mils for MIL and Telecom products .

Inge




On 28 October 2011 14:45, Amol Kane <[log in to unmask]> wrote:

> Dear Technetters,
> Is there a spec/guidance/industry best practice recommendation on the
> maximum height of artifacts (like silkscreen, via tents etc.,) above the
> soldermask surface?. Assuming the stencil foil sits squarely on the
> soldermask, any height above that will induce a (localized) standoff if any
> such artifact is near the pad. We have some boards in which the via tents
> are 7 mils above the rest of the mask surface. Some of these vias are close
> to fine pitch devices. I am afraid that I won't be able to control the
> volume of paste during printing leading to shorts. The board house saying I
> won't have an issue (big surprise there! :)). Is there something I can use
> as a basis of my push back ?
>
> Thanks in advance!!
>
>
> Amol Kane | Process Engineer
> Catalyst Manufacturing Services, Inc.
> 941 Route 38, Owego NY 13827
> Phone: (607) 687-7669 Extn 349 | Website: www.catalystems.com<
> http://www.catalystems.com/>
>
>
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