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October 2011

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Steve Gregory <[log in to unmask]>, TechNet E-Mail Forum <[log in to unmask]>
Date:
Fri, 28 Oct 2011 10:34:57 -0400
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TechNet E-Mail Forum <[log in to unmask]>, Amol Kane <[log in to unmask]>
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Amol Kane <[log in to unmask]>
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The story I got from the board house was that the mask actually oozed out thru the via on the other side during topside cure and essentially pooled up forming a bump. We are investigating calling out for a plug and tent on that board to try to resolve this issue. 

I had a 3 mil max number for height in mind....is that a reasonable number to go with?

Amol Kane | Process Engineer
Catalyst Manufacturing Services, Inc.
941 Route 38, Owego NY 13827
Phone: (607) 687-7669 Extn 349 | Website: www.catalystems.com


-----Original Message-----
From: Steve Gregory [mailto:[log in to unmask]] 
Sent: Friday, October 28, 2011 9:06 AM
To: 'TechNet E-Mail Forum'; Amol Kane
Subject: RE: [TN] maximum height of artifacts above the soldermask

Hi Amol,

7-mils? WOW, that's a lot! If you're trying to print paste and have anything
holding the stencil up, especially close to fine pitch devices, then you're
going to lose your print definition and print more paste than you intend.
How fine is the fine pitch? 20-mils? 25-mils? I was going to suggest
something that I have done in the past which is to have the vias half-etched
in the bottom of the stencil so that the stencil can sit flush and gasket
against the PCB. But if the bump is truly 7-mils you wont be able to do that
because the bump height will exceed the stencil thickness (I typically use
4-6 mils).

Why are the via tents 7-mils tall? Did they get done twice or something?

Steve 

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Amol Kane
Sent: Friday, October 28, 2011 8:45 AM
To: [log in to unmask]
Subject: [TN] maximum height of artifacts above the soldermask

Dear Technetters,
Is there a spec/guidance/industry best practice recommendation on the
maximum height of artifacts (like silkscreen, via tents etc.,) above the
soldermask surface?. Assuming the stencil foil sits squarely on the
soldermask, any height above that will induce a (localized) standoff if any
such artifact is near the pad. We have some boards in which the via tents
are 7 mils above the rest of the mask surface. Some of these vias are close
to fine pitch devices. I am afraid that I won't be able to control the
volume of paste during printing leading to shorts. The board house saying I
won't have an issue (big surprise there! :)). Is there something I can use
as a basis of my push back ?

Thanks in advance!!


Amol Kane | Process Engineer
Catalyst Manufacturing Services, Inc.
941 Route 38, Owego NY 13827
Phone: (607) 687-7669 Extn 349 | Website:
www.catalystems.com<http://www.catalystems.com/>


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