Hi Mark - our preferred method is to plate them shut so that we have no 
possible issues for either solder thieving or some type of process fluids 
(either fabrication or assembly) entrapment. The cost of the board 
increases but we feel the increase is worth it in terms of issue 
avoidance.

Dave



Mark Larson <[log in to unmask]> 
Sent by: TechNet <[log in to unmask]>
08/31/2011 04:21 PM
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Re: [TN] QFN with solder slug






Thanks, I wanted to hear how others are doing it, only thing different we 
are doing is using 10 mil via, and that should be less of a problem than 
12, and we are not connecting all layers to the vias, just  the back side.

Dave - yes, that is the main point we are now debating, to cap the vias or 
not with soldermask. By cap I mean put a layer of soldermask just slightly 
bigger than via hole, then the "normal" layer of solder mask, to the 
bottom side only of course.
as for filling them, we really want to avoid that.


Perhaps our real problem is being too conservative (small via, we are only 
using 5 where the design engineers estimate is 6-8, and not connecting 
inner same net planes) will prevent enough heat transfer, the whole point 
of the slug, right?

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