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Date: | Mon, 5 Sep 2011 09:47:11 -0400 |
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Your designer should be the one to answer the question.
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----- Original Message -----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Monday, September 05, 2011 05:52 AM
To: [log in to unmask] <[log in to unmask]>
Subject: [TN] Fw: Electroless Ni plating thickness
Hello Technetters.
We use a ceramic substrate covered with Cu layer. This Cu layer is plated
with ENIG process.
We solder SMD's on it with SnPb process (vapor phase and iron).
The ASTM specifications give a thickness of Ni 4 ± 2 µm.
Where comes from this value ?
What could be an issue with thinner Ni layer like 0.5 µm ?
Thanks to answer.
Best regards,
CANTAGALLO Luigi
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