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August 2011

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From:
"Upton, Shawn" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Upton, Shawn
Date:
Thu, 18 Aug 2011 15:29:29 +0000
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Wouldn't the typical space rule apply?  I thought planes were put onto core/pre-preg the same way the traces were, thus, same rules.  [Seems wise to run with a bit more space, high voltage withstand, and effects of large copper pours on PCB fabrication, whatever those are.]

I don't remember what the current answer is for the pad on unused layers--does it need a pad, or can it be w/o annular ring (seems better to use annular ring on all layers, but in some route situations it's too tight; but IIRC leadfree was better if the pad was there on all layers, regardless of use).

Shawn Upton, KB1CKT
Test Engineer
Allegro MicroSystems, Inc
[log in to unmask]
603.626.2429/fax: 603.641.5336


-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Micahel T. Handy
Sent: Thursday, August 18, 2011 10:57 AM
To: [log in to unmask]
Subject: [TN] IPC spec for split and mixed planes

To all, is there an IPC specification for design of split/mixed plane design. I'm looking for design parameters for the gap spacing between split planes and how to place thru hole vias between the isolated planes. Any help would be greatly appreciated.
Mike Handy


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