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June 2011

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Subject:
From:
Victor Hernandez <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, [log in to unmask]
Date:
Tue, 7 Jun 2011 10:35:22 -0500
Content-Type:
text/plain
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text/plain (47 lines)
Fellow TechNetters:

   I apologize for multiple post of this inquiry.   I have had no feedback on and would definitely like to have some sort of dialogue on the topic.

Victor,

-----Original Message-----
From: Hernandez, Victor G 
Sent: Monday, June 06, 2011 2:14 PM
To: Joyce Koo
Cc: Hernandez, Victor G
Subject: FW: PWB - Thermal Stress - TM650, 2.6.8

Joyce,

   Any thoughts on this scenario.

Victor,

-----Original Message-----
From: Hernandez, Victor G 
Sent: Monday, June 06, 2011 12:24 PM
To: TechNet E-Mail Forum
Cc: Hernandez, Victor G
Subject: PWB - Thermal Stress - TM650, 2.6.8

Fellow TechNetters:

   How valid would it be to send an entire board, 16X19x0.094 inches, through the wave solder process x number of times, 1x, 2x, 3x, etc., and call it thermal stress.   Also the extracted coupon size are ¾ x 1/2 inches removed with a router .   What are the Pros and Cons with this method of thermal stress in accordance with IPC guidelines.

"X"

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