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May 2011

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From:
"Thayer, Wayne - IIW" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Thayer, Wayne - IIW
Date:
Thu, 12 May 2011 17:05:01 -0400
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Hi Gregg-

Sounds like it might not be a good situation, depending on the characteristics of the staking compound.  If it has a high CTE with respect to solder, and gets underneath a part, then it could reduce the expected lifetime of the solder joint.  I think that staking compounds for BGAs are primarily designed to assist with increasing the survivability of shock loading.  I don't believe there's enough of it under the BGA to impact the cyclic temperature stress on solder joints.  Of course, if your app has low thermal cycle stresses, there shouldn't be a problem.

Wayne



-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Gregg Owens
Sent: Thursday, May 12, 2011 1:54 PM
To: [log in to unmask]
Subject: [TN] Staking Component on Adjacent Components

I have been asked to look into the requirements for the following condition:

Stake bonding adhesive has flowed onto adjacent chip resistors and capacitors. The adhesive has completed covered one end of the two capacitors (land, end metallization and solder joint) but not flowed up onto the component body or around to the sides. The adhesive has also flowed to an adjacent chip resistor contacting the entire side of the component but not in contact with the end termination or solder joints.

As for IPC standards, I only found:

J-STD-001E 10.3 a Placement Staking material shall not (P1D2D3) contact component lead seals unless the material has been selected so as not to damage the component/assembly in its service environment.

Since the  J-STD-001 requirement seems to be inferring to through-hole connections, I don't feel this is sufficient justification to push back to our vendor. Quality's concern is reliability of the product in the field (Class 2 application). In a past life I worked with a company which had adhesive cover one-half of a ceramic capacitor. I always assumed introduction of the adhesive compromised the chip's thermal stress relief causing the capacitors to crack.  In this case these capacitors failed almost immediately in the field (cracked) causing them much frustration. "War stories" aren't good justifications for conclusions to push back to vendors.

Thoughts for requirements from any standards or white papers? Thanks,

Gregg Owens | Sr. Technical Writer
Wavestream Corporation


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