TECHNET Archives

April 2011

TechNet@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
"Bogert, Gerald L (Contractor)" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Bogert, Gerald L (Contractor) <[log in to unmask]>
Date:
Sat, 2 Apr 2011 10:43:05 -0400
Content-Type:
text/plain
Parts/Attachments:
text/plain (169 lines)
April 2, 2011

Thanks.  The volume is low so step 2 may be viable option.  For next
production the OEM will fix the design.

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Graham Collins
Sent: Friday, April 01, 2011 2:54 PM
To: [log in to unmask]
Subject: Re: [TN] Soldering two SMT resistors to lands originally
designed for only one resistor; is it technically OK?

Hi Gerald
What kind of build volume are you talking about?  #2 below is easiest if
the volume is low.

Were it my issue I would look at two possibilities:
1) modify the board, attach bigger pads.
or
2) Solder one part on the pads as per standard.  Glue the second part on
nearby and run jumper wires to connect it.

regards,
 - Graham

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Bogert, Gerald L
(Contractor)
Sent: Thursday, March 31, 2011 7:29 AM
To: [log in to unmask]
Subject: [TN] Soldering two SMT resistors to lands originally designed
for only one resistor; is it technically OK?

March 31, 2011

 

Folks, we have an OEM who needs to incorporate a design change into an
existing design circuit card assembly (CCA) used in a Class 3 military
application that will see shock, vibration and high humidity
environment.  

 

In the existing design, a chip resistor is soldered to land areas with
the following dimensions:  Width is 0.080 inches length is 0.035 inches.
Spacing between lands is 0.040 (makes the overall length 0.110).

 

The OEM needs to remove the existing resistor and solder two new
resistors to the existing land areas.  The new resistors are
M55342K06B4E02R (MIL-PRF-55342/6, 0.15W, 1%, 4.02K).  From the military
specification, the overall part length is 0.080 inches; the width is
0.050 inches, and the termination width is 0.016 inches.  The tolerance
on the 0.050 dimension is plus or minus 0.005 inches.

 

From the above information, I calculate that when the two resistors are
soldered onto the existing lands, the parts will overhang on both sides
of the lands by 0.015 inches (assumes the resistors are spaced 0.010
inches apart to account for the 0.005 inch tolerance on the 0.050
dimension).  From IPC-A-610E, paragraph 8.3.2.1,and Table 8-2, the
maximum allowable overhang for Class 3 product would be 0.0125 inches,
and for Class 2, 0.025 inches.

 

This means that side overhang would not meet Class 3 for Dimension A,
but would meet Class 2 requirements.

 

Is this design change technically acceptable for Class 3?  Given the
above information, is there sufficient solder joint formation (assuming
perfect soldering process) to provide the requisite level of
reliability?  What is the relationship of side joint overhang to
reliability?  What data exists to support the A Dimension criteria in
Table 8-2 of IPC-A-610?

 

The OEM is considering obtaining additional solder joint volume by
soldering a jumper wire from the end terminations of each resistor to
the land area such that the jumper wire would act as an additional
soldered conductor.  He is also considering whether the parts should be
glued on the sides for support.

 

It appears that it would be acceptable to just solder both resistors as
described above, without the need to add the jumper wire or glue, which
would mean we would accept the violation of Dimension A for Class 3.
Note also that there is no electrical clearance concern using this
design fix and there is no known other acceptable design fix; if this
fix is not technically acceptable the CCAs would need to be scrapped..
We considered stacking the resistors on top of each other but this was
rejected because; 1) not recommended by the military specification; 2)
cannot guarantee that the top surface of the terminations are solderable
- the mil spec exempts this surface from solderability test
verification; and 3) possible heat transfer issues. 

 

Any advice folks could provide to the above would be appreciated.

 

 


______________________________________________________________________
This email has been scanned by the MessageLabs Email Security System.
For more information please contact helpdesk at x2960 or
[log in to unmask]
______________________________________________________________________

---------------------------------------------------
Technet Mail List provided as a service by IPC using LISTSERV 15.0 To
unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or
(re-start) delivery of Technet send e-mail to
[log in to unmask]: SET Technet NOMAIL or (MAIL) To receive ONE mailing
per day of all the posts: send e-mail to
[log in to unmask]: SET Technet Digest
Search the archives of previous posts at:
http://listserv.ipc.org/archives
Please visit IPC web site
http://www.ipc.org/ContentPage.aspx?Pageid=E-mail-Forums for additional
information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100
ext.2815
-----------------------------------------------------

______________________________________________________________________
This email has been scanned by the MessageLabs Email Security System.
For more information please contact helpdesk at x2960 or
[log in to unmask]
______________________________________________________________________

---------------------------------------------------
Technet Mail List provided as a service by IPC using LISTSERV 15.0 To
unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF Technet To temporarily halt or
(re-start) delivery of Technet send e-mail to [log in to unmask]: SET
Technet NOMAIL or (MAIL) To receive ONE mailing per day of all the
posts: send e-mail to [log in to unmask]: SET Technet Digest Search the
archives of previous posts at: http://listserv.ipc.org/archives Please
visit IPC web site
http://www.ipc.org/ContentPage.aspx?Pageid=E-mail-Forums for additional
information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100
ext.2815
-----------------------------------------------------

______________________________________________________________________
This email has been scanned by the MessageLabs Email Security System.
For more information please contact helpdesk at x2960 or [log in to unmask] 
______________________________________________________________________

---------------------------------------------------
Technet Mail List provided as a service by IPC using LISTSERV 15.0
To unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF Technet
To temporarily halt or (re-start) delivery of Technet send e-mail to [log in to unmask]: SET Technet NOMAIL or (MAIL)
To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest
Search the archives of previous posts at: http://listserv.ipc.org/archives
Please visit IPC web site http://www.ipc.org/ContentPage.aspx?Pageid=E-mail-Forums for additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815
-----------------------------------------------------

ATOM RSS1 RSS2