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Subject:
From:
Steven Creswick <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Steven Creswick <[log in to unmask]>
Date:
Wed, 2 Mar 2011 15:33:09 -0500
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Mike,

Thanks for the reply.

I should think that if you were stacking flip chips, you would have up/down
looking placement equipment of sufficient accuracy to line up say 75-100µm
bumps with the corresponding pads - so I chalk up equipment capability as
being one potential problem.

Flux underfills/no-flow underfills work super-great for FC's.  Just dispense
a dot in the center and place your chip slow enough that the underfill
doesn't cavitate, or simply squirt out from the shock of a lightning speed
descent - potential problem number two, having the ability to control
descent rate of placement equipment [further assuming that it has the
accuracy].

While a flux underfill/no-flow underfill is almost goof proof, stuff still
happens.  If you were to stack multiple FC's successively on top of one
another there would be little opportunity to verify lack of voiding much
below the topmost two devices via acoustic means.  If the topmost device
were smaller than the next FC down [say by 1.5-2x the thickness of the
topmost chip, per side], one just might be able to acoustically scan the
second third device interface.  I've examined the floor of cavities before
with an acoustic microscope, but a lot depends on the wall height,
proximity, and transducer frequency. - so next potential problem is
underfill verification because x-ray doesn't work.

Okay, so you decide not to underfill because you are going FC to FC and have
an exact CTE match - how do you assure that all the bumps wetted?  Better
have a good x-ray system to see the small bumps.  Would not be something I
would like to visual if I could help it.

If you had to post underfill - one would have to have each successive device
inset from the previous so as to get an underfill reserviour around at least
two sides of the chip - potential problem - have enough realestate?

Simultaneous or successive reflow?  Even a FC will self-center on
corresponding attach pads with or without flux underfill [within reason of
course].  Now then, if you were to stack multiple un-reflowed FCs and expect
to flow them all at once, I would be suspicious of consistent success.  Flux
underfill will 'hold' the chips, but ...  equipment vibration, part movement
makes mass reflow sound do-able in the lab, but I wonder about Production...
- Potential problem - if you are stacking multiple die, will their joints
like seeing successive reflows??

Another problem with successive reflows might be that as the stack gets
farther from the heatsink/source of the PWB/whatever, will the profile need
to be adjusted for optimum results?  If you had a conduction reflow system,
this would certainly seem to come into play - not that that is the system
most people would have however.

I could very easily see patenting a concept whereupon the die are inversely
stacked, underfilled and reflowed off-line and presented to the final
assembly as a 'chip component' in pocket tape. - potential problem - have to
bend the 'rules' a little bit!

Your are right!  Placing 0603's and 0402's and BGA's is like work for the
blind with the appropriate equipment.  So is placement of FC's and µBGAs to
a certain extent.

Are those different enough thoughts on problems?


Steve Creswick
http://www.linkedin.com/in/stevencreswick






-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Mike Buetow
Sent: Wednesday, March 02, 2011 2:49 PM
To: [log in to unmask]
Subject: Re: [TN] POP THE QUESTION??

Hi Steve,

FCs and BGAs are what I was referring to. I would say the original
question wasn't whether it was easy, but what the potential problems
could be. Placing 0603s is easy, but that doesn't mean problems
can't/won't happen.


Best,
Mike

Mike Buetow
Circuits Assembly
w/m 617-327-4702

>>> Register now for Virtual PCB www.virtual-pcb.com <<< Chats and free
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-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Steven Creswick
Sent: Wednesday, March 02, 2011 2:35 PM
To: [log in to unmask]
Subject: Re: [TN] POP THE QUESTION??

Chris, Mike, Bev - 

Are you speaking of something other than stacking compatible flip chips
or
BGA's?  

Those would seem easy by using a no-flow underfill, or a post applied
underfill [assuming size reduction with each step].

Give this ol' microelectronics geek a clue.


Steve Creswick
http://www.linkedin.com/in/stevencreswick





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