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March 2011

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Subject:
From:
Bob Landman <[log in to unmask]>
Reply To:
Bob Landman <[log in to unmask]>
Date:
Thu, 17 Mar 2011 13:03:20 -0400
Content-Type:
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text/plain (137 lines)
Uppina,

So very sorry to hear of your situation.  Our condolences.

We've been using ENIG for many years now and have never had black pad blues.  The alternatives, to us, are worse.  Silver has a shelf life problem (we order boards by the hundreds and we only run them in batches of 25-50 so the storage life of silver is a problem.  HASL isn't flat enough, it's been our experience, to mount our very tiny QFN analog parts.  Our assembler, Mentzer Electronics in Burlingame CA uses a MyData paste jet printer to put down the solderpaste and vapor phase reflow and the result is a beautiful product we can depend on to last 20+ years.

Why? IMHO, it's because we use SnPb solder and only BGAs that have SnPb balls at a much lower reflow temp.

We do a large batch of tight pitch 4 layer boards with tiny QFNs and a 256 ball BGA.  They are often in stock (in anti-static gray bags) for many months before they go into our products to be used.  Have had them in the field in Asia and many states in the USA and have had no field failures for many years now.

Our board house is Bay Area Circuits in Redwood City CA (contact: Harvey Garcia).  They send the boards out for ENIG processing since they were not doing enough of it to make it economically practical (the process must be carefully controlled or you get the black pad blues).

FYI, SAC solder balls are a no-no in my business as is lead-free manufacturing.  If someone wants lead-free product they can buy it from one of my competitors.  I want hi reliability and that's why we are developing the LDF process to coat the finished boards with a metal cap to prevent (not mitigate) the growth of tin whiskers on those areas of part leads (particularly tight pitch SOICs) that have tin plated leads.  You can read about the process at www.ldfcoatings.com and we'll be presenting a paper at SMTA in Toronto on the process May 4th.

Regards,

Bob Landman
H&L Instrumemnts, LLC
LDF Coatings, LLC

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Amol Kane
Sent: Thursday, March 17, 2011 9:19 AM
To: [log in to unmask]
Subject: Re: [TN] Query on failure of assembled PCB

Did you say reflow with a peak of 262C??...that's excessive by even lead-free standards. Most lead-free components are rated to only 260C. a peak reflow temperature of 235C to 245C should suffices in a majority of cases. 

Amol Kane | Process Engineer
Catalyst Manufacturing Services, Inc.
941 Route 38, Owego NY 13827
Phone: (607) 687-7669 Extn 349 | Website: www.catalystems.com


-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Uppina Nagaraj
Sent: Wednesday, March 16, 2011 10:28 PM
To: [log in to unmask]
Subject: [TN] Query on failure of assembled PCB

Dear All,

1. We are manufacturers of PCBs. One of our customer has reported
   failure in assembled boards. The main observation is that after
   assembly, the assembled units were functioning normally
   and had passed all the stipulated electrical tests. These parts
   were kept at the assembly house for around over 3-4 months. Later
   when the assembled units were scheduled to be integrated into
   the system, the assembled units were tested again, but now they
   see failure.

    These are the inputs given to us..........
    a) Failures are intermittent in nature.
    b) Failures are concentrated in and around the area where
       BGA is mounted.
    c) Some failures are recovered by applying mechanical stress on
       the PCB.
    d) Some are recovered by subjecting to reflow.
    e) There are no component failures.

2. Our customer's assembly process flow is.
    a) 100Deg C, 16 hours baking
    b) Assembly done within 24 hours after baking
    c) Pb-free reflow conducted with a peak temperature of 262Deg C
    d) Reflow is done 2 times (once for each side of components)
    e) Visual and physical inspection done
    f) Cycling done at -20~+70Deg C for 10 cycles. First 9 cycles
       are 30minutes per cycle and the last cycle is 1 hour cycle
   g) Electrical testing

3. We had retrieved a blank PCB from the same batch and conducted
   the following trial......

   a) A standard step of baking prior to assembly (100Deg C,
      16 hours baking) was skipped due to time constraint.
   b) 2x reflow done at customer's place using standard profile
      used for assembly of this part.

     Electrical Testing (BBT) on bare PCB passed .

   c) 10 cycles of temp. cycling done at customer's place using the
      standard cycling profile used for assembled unit.

      Electrical Testing (BBT) on bare PCB passed .

   d) Repeated 2x reflow (2nd time) at customer's place using
      standard profile used for assembly of this part.

      Electrical Testing (BBT) on bare PCB passed .

     Based on the above trial, we feel that the failure seen is
     not due to PCB failure.


4. This particular PCB is a 8 layer PCB, built using ISOLA FR370HR
   material.
-----------------------------------------------------------------


Please share your inputs and thoughts on the failure phenomenon and how to ascertain if the failure is due to PCB or assembly.

Thanks in advance!

Best Regards,
U.Nagaraj




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