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Subject:
From:
Paul Reid <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Paul Reid <[log in to unmask]>
Date:
Mon, 14 Mar 2011 07:25:47 -0400
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Hi Pardeep,

You wrote that the thermal excursion was an isotherm at 60°C then another five at 13°C. That would be a very benign thermal cycle. Even if the thermal excursion were 60°C and 130°C that would be a very mild thermal excursion. I expect the soldering temperature would exceed 230°C in a tin lead application. The thermal excursion may be more representative if the five cycles were closer to 230°C with an isotherm just long enough to make sure the PWB reached 230°C. 

Are these plated through hole boards? Was there any sequential lamination?

HASL and tin lead fusing may degrade dielectric materials but the manual assembly may be the most variable thermal process in this case and the most damaging.

Delamination is insidious. Using macroscopic examination delamination tends to be visible on outer layers only. Delamination tends to be more prevalent in the central zone of the board. Internal delamination tends to go unnoticed. 

The increases in assembly temperatures in response to "RoHS" forced us to develop better methods to find material damage in our test coupons. Because we find material damage electronically, then follow up with microscopic examination to confirm or refute the presents of delamination, we are becoming experienced with material damage in PWBs. What we observe is the random nature of delamination makes it hard to find using microsectioning exclusively, unless the delamination is wide spread across the test samples. Typically we see delamination in just a few coupons out of a test set which presents a challenge to the random sample selection, and limited sample size imposed by microsectioning.

We find the solder float stress test is not as representative as it was when boards were assembled using wave solder. The solder float test can give false positive results. It appears the time at temperature is just too low in the solder float test. The solder float method has difficulty detecting compromised PWBs. TM 650 2.6.27 Thermal Stress, Convection Reflow Assembly, may be the better test even though it simulates automated lead free assembly it is the better, more informative, test. I would have a lab run that test modifying the thermal profile down to tin/lead temperatures for an objective evaluation of your boards.

If the boards pass 2.6.27 and solder float then you may have an objective case that the vagrancies of hand assembly is too variable and aggressive for that product design, fabricated with that material.


Sincerely, 
Paul Reid 

Program Coordinator 
PWB Interconnect Solutions Inc. 
235 Stafford Rd., West, Unit 103 
Nepean, Ontario 
Canada, K2H 9C1 
613 596 4244 ext. 229 
Skype paul_reid_pwb 
[log in to unmask] <mailto:[log in to unmask]> 

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Pradeep M
Sent: March 14, 2011 5:25 AM
To: [log in to unmask]
Subject: [TN] Delam after thermal cycling
Importance: High

Dear technetters,

We are from a PCB mfg organization. One of our customers has made an
observation on one of the boards that we had supplied to them earlier. This
is a 6 layer card which we had manufactured in July 2007. This board does
not have solder mask and has normal HASL as the surface finish. The customer
had taken this up for manual assembly with hand soldering after some time.
Typically with this customer, the whole assembly usually takes nothing less
than 6-8 months for completion.  They had completed the assembly and had
subjected the assembled board for thermal cycling ( a procedure which they
follow). Thermal cycling is being done at 60 deg C for 2.5 Hrs then at 13
degC for 2.5 Hrs for five cycles.  After this the assembled board has been
coated with conformal coating.  Some more functional tests were conducted
and this card is integrated together with other boards. Then a hot and cold
storage test as part of test and evaluation (T&E) of the package was done.
Storage test (passive ) is at the same extremes but active at 40 deg C. The
customer had opened the package for correcting an anomaly observed, when
they found some 'delamination' on the board.  The customer has sent a
photograph and wants us to respond with our comments. Customer says the
board was looking fine after assembly as well as after the first thermal
cycling. 

We are quite surprised on how a delamination can happen at max of 60 deg C.
We do a microsection analysis of every processed panel and also does a
thermal stress as per IPC TM 650 prior to the dispatch. We have asked for
the actual board to ascertain the delamination, but this might take some
time. The conformal coating material removed by peel off manually by the
customer. We had used Nelco 4000-6 170 Tg FR4 material.  

Can anybody provide us some inputs. The photograph may be shared directly.

Rgds

Pradeep

 

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