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February 2011

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Subject:
From:
Dennis Fritz <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Dennis Fritz <[log in to unmask]>
Date:
Mon, 28 Feb 2011 10:26:56 -0500
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Jonathan - 

Your problem is exactly why IPC Standard J-002 was developed.  Using this standard enables you to quantify, before you mount components and have to rework, how much difference there is in solderability   Sounds like your assembly conditions are a very sensitive test for tin plating!!

Denny Fritz






-----Original Message-----
From: jonathan noquil <[log in to unmask]>
To: TechNet <[log in to unmask]>
Sent: Mon, Feb 28, 2011 8:45 am
Subject: [TN] Solderability of Matte Sn Finish Package


Hi All
I noticed that there are differences in the solderability of two packages
ounted on the same board side by side with each other
sing the same reflow profile and paste.
The first package has almost less than 5 % voids of the total area and the
ther package has almost 90 % voiding.
Would there be an effect of the Sn plating quality to the solderability of
hese packages? What are the factors affecting Sn plating quality?
Thanks

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