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November 2010

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Subject:
From:
Joyce Koo <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Joyce Koo <[log in to unmask]>
Date:
Sun, 21 Nov 2010 13:00:19 -0500
Content-Type:
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text/plain (249 lines)
Thx John!  For telling me I was part of problem not the solutions!  Thx to provide solutions :)
--------------------------
Sent using BlackBerry


----- Original Message -----
From: John Goulet [mailto:[log in to unmask]]
Sent: Sunday, November 21, 2010 12:23 PM
To: [log in to unmask] <[log in to unmask]>
Subject: Re: [TN] Detecting Oxidation Levels of PTH

Now that I've seen your reply to Joyce I can see why your having problems. 

 As good as our process control was, when our customer changed from ENIG to OSP the quality went way down and rework and inspection cost went way up. It was just horrible. Our customer finally got rid of it an switched to the new nano-technology surface finish which was better than ENIG. 

OSP problems in the real world. 

1. You can't bake OSP so if the stock room opens the package and not all the boards were taken or due to a schedule change the boards were used and not resealed you can have problems. 

2. The boards see 2 reflow process which burns off most of the OSP coating.The boards must be hand assembled and into wave solder within 24 hours. However what typically happens is that any board that needs SMT rework and BGA rework get pulled into the repair area and stay there for a week! 

 - If BGA rework or replace is done, typically because they put them on in the wrong orientation, then the board gets two additional  thermal cycles in the area of the BGA. In additon the control plan is gone because now the assembly out of the mainstream process for a week. 

 - By the time the boards get to Pre-wave hand assembly and wave the boards are at risk by degredation of the surface finish. 

3. SAC alloys especially SAC 305 doesn't wet as well as Eutectic solder. 

4. Remember the strongest No-Clean flux is only 1/3rd as good as an organic Acid flux.  



Best recommendation is to get the customer to change the PCB plating to the nano-technology finishes. 

In the mean time you may have to top flux the pins being careful not to let the flux go anywhere else where the flux temp doesn't get hot enough to burn off the activators. 

5. Process verification. If your X-ray doesn't have the tilt beam capability then tilt the board using an black ESD bin or make a narrow ESD frame with slots in the open frame type base to allow different angles. I can provide a drawing. You can see not only the hole fill relative to the top and bottom annular ring and see if your in spec for VCC and ground pins. You can see voids but don't be fooled by little voids at different heights in the solder joint that look like one big void when viewed from a steep angle. If you see a large void rotate the board slighlty to get another view. 



 6. Wave Solder problems often caused by Hand aseembly and pallet design not the wave operator. 

 6.1.   Poor heat transfer from leads cut too short, clinched and blocking the spray flux, 

 6.2    Pallet design and clearance around the lead, thick pallets with no gas grooves, no wave pockets around open areas, thermal reliefs especially in the corners of the pallet where there is more thermal mass and this is where a lot of connectors are. As a result there is less heat transfer. Wall of the opening too close or lead end shadows the fist row of leads, or pallet blocked the spray fluxer. 

6.3   Fluxer setup, traverse speed relative to conveyor speed, spray pressure, distance of spray head from bottom of the pallet/board for proper angle and test to assure there is enough flux at the edge of the spray pattern and verticle enough to get up the hole. The Vitronic bubble jet is more direct and when the set up is right and not clogged, it works well. 

6.4   Wave compression and actual heigh is not even across the bottom due to poor design. To eliminate solder pushing out the sides or appearance that the leading edge is too deep because the relief grooves leading to the wave pocket reliefs are missing. 

6.5   You may get burnt flux and dross shorts across pins when using selective solder pallets with round shaped openings with no relief grooves. The burnt flux on the base of the pallet and some dross swirls around and has no place to go so it typically and randomly makes a short on the last 2 pins in a row of connector or simm socket pins when No-Clean flux is used. The pallet design should cause a straight front to back flow (leading edge to trailing edge) to avoid these types of shorts. 

If you want to write to me and want pictures you can contact me. [log in to unmask] 

John Goulet 

MFG/Process Engineer 

----- Original Message ----- 
From: "Leland Woodall" <[log in to unmask]> 
To: [log in to unmask] 
Sent: Friday, October 15, 2010 8:35:22 AM 
Subject: Re: [TN] Detecting Oxidation Levels of PTH 

Joyce, 

It does indeed see 2 SMT cycles, is OSP over copper, and a lead free SAC 
305 process.  Our flux is a no-clean with 10% solids in an ultrasonic 
spray application at wave solder. 

Leland 

-----Original Message----- 
From: TechNet [mailto:[log in to unmask]] On Behalf Of Joyce Koo 
Sent: Thursday, October 14, 2010 9:23 PM 
To: [log in to unmask] 
Subject: Re: [TN] Detecting Oxidation Levels of PTH 

If it is OSP board, after 2 SMT, you might have problem if use less 
active flux.  Wetting balance or normal spread test may not show any 
relevance.  My 2 cents (real 2 cents, not 1.99. :-) 
-------------------------- 
Sent using BlackBerry 


----- Original Message ----- 
From: Chris Mahanna [mailto:[log in to unmask]] 
Sent: Thursday, October 14, 2010 09:18 PM 
To: [log in to unmask] <[log in to unmask]> 
Subject: Re: [TN] Detecting Oxidation Levels of PTH 

Leland, 

The very quick answer: the latest general consensus is to not test the 
hole, but rather test the surface with a quantifiable performance based 
method - 
wetting balance or spread test.  Both are available on the new 2221 W 
coupon.  Both are slated for pass fail criteria in next rev of 003. 

Chris 
Chris Mahanna 
Robisan Lab 

-----Original Message----- 
From: TechNet [mailto:[log in to unmask]] On Behalf Of Leland Woodall 
Sent: Thursday, October 14, 2010 3:49 PM 
To: [log in to unmask] 
Subject: [TN] Detecting Oxidation Levels of PTH 

Techies, 

We have one assembly that sporadically experiences insufficient solder 
fill of plated through holes at the wave soldering process. 

If we cross section one of these, what testing equipment is best suited 
to detect the presence of oxidation on the PTH walls?  What would be 
considered an unacceptable level that would prevent 100% climb? 

Thanks in advance for your responses! 

Leland 

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