All
In my previous message I said that "in the past" this was done to reduce the risk of delamination. I know this did happen in service on many avionics assemblies when the research was conducted for NBC warfare effects.
I also know that most folks stipulated "no coating on the edges" to avoid having assemblies get stuck into their carrier frames.
I guess this was one of those classic problems encountered in the field that the designers had no clue about....until it was too late.
Given the role that a CC is intended to provide, wouldn't it be simpler, as was the case way before the advent of robotic systems, to permit edge coverage. Dip & Spray coating methods require masking that folks try to avoid, and as you can dip 600+ assemblies per hour in a dip process, its a popular application technique but a nightmare/dream if you have to mask.
In conclusion: IT DEPENDS! Ker-ching...
Regards
Graham Naisbitt - KBO
Email: [log in to unmask]
Phone: +44 (0)12 5252 1500
Web: www.gen3systems.com
On 20 Oct 2010, at 22:40, Douglas Pauls wrote:
> Thank you all for your responses. As indicated earlier, how I wish I
> would have had this kind of resource back in the 80s. Here are my
> thoughts on the matter.
>
> At Rockwell, home of truth justice and the American way, we do a great
> deal of coating by hand. A classic case of LEAN principles applied wrong,
> though I am told it made sense at the time. I am working on bringing back
> spray coating, but it is tough to change an entrenced culture.
>
> We have often required coating the board edges on our drawings, generally
> because "we have always done it that way". We may have done it for some
> of the reasons you all have given, but the technical rationale is probably
> buried somewhere in our archives. However, this edge coat requirement is
> selective in application. When the edges of the board have metal clad
> areas on top and bottom, such as with card guides, the edges are not
> coated, because it is very difficult to coat just the edge and not get any
> on the top or bottom card guide. Similarly, if we have a large high
> density connector on the board edge, that is flush mounted to the board,
> we do not coat the edge under that connector as it is next to impossible
> to do without flooding the connector surfaces. It is not unusual to have
> three out of four sides of an assembly uncoated (two card guides, one
> connector, one coated edge). So our apparent philosophy is to coat board
> edges unless it is too hard.
>
> One of the things that having a LEAN philosophy as a driver does for you
> is that you are constantly evaluating processes asking "is this really
> necessary?", or "is this value added?". For us, coating the edges of the
> board takes additional time and effort. It can also lead to rework or
> touch up activities as well. I cannot say we have ever had field failures
> or problems from board edges that are uncoated. Since we deal with some
> pretty harsh environments, if this had truly been a failure mechanism,
> such as for moisture ingress, we would have seen it by now.
>
> One of the key points for me, is that we are dealing with board edges that
> are routed, which has a tendency to seal the board edge, as opposed to
> punching or V-scoring, which can leave exposed fibers and has a greater
> risk of moisture intrusion. If I had punched or scored/snapped edges, I
> would consider edge coating to be necessary. But since I have routed
> edges, I ask myself the question of whether edge coating is value added.
>
> Would you agree with my reasoning?
>
> Inge, when you say board that are sensitive to water ingress, what do you
> mean? Is there a particular laminate material, such as Teflon or the high
> speed laminates, that is a consideration? Second, how do you determine
> how harsh an environment has to be in order to coat the edges?
>
> As for Parylene, remember, a nightmare is also a dream.............
>
> Now, to be perfectly honest, I can't really pass all this questioning off
> as high minded LEAN driven noble pondering. It's actually because I
> messed up last week. I used this reasoning on one, ONE mind you, program
> to relax the edge coat requirement for a tough application. Now I have a
> hundred requests, many along the lines of "Why do I have to coat my board
> edges if Donna does not have to coat hers, huh, huh?". There are some
> days here I REALLY don't want to be the coating expert.........
>
> Doug Pauls
>
>
>
> Inge <[log in to unmask]>
> Sent by: TechNet <[log in to unmask]>
> 10/20/2010 03:46 PM
> Please respond to
> Inge <[log in to unmask]>
>
>
> To
> [log in to unmask]
> cc
>
> Subject
> Re: [TN] Conformal Coating Board Edges
>
>
>
>
>
>
> Well, it depends..
>
> example 1: boards sensitive to water ingress via edges: we used
> multilayers
> of cc along edges
> example 2: boards with rough edges damaged the rack slides: we used cc
> along
> edges
> example 3: boards with smooth edges, no harsh environment: we did not use
> cc
> along edges
> there are more examples of course
>
> Conformal coating the edges was tricky, because of the sharp edges. The
> viscosity was therefore very important. Someone mentioned Parylene, that
> one
> has no such problem. Parylene is a dream stuff.
>
> Lately, we have skipped edge coating, except when the customer wants it.
>
>
> I had a look into MoonMan's POD, which covers most about PCB
> manufacturing.
> Strange enough, nothing about edge coating.
>
> Inge
>
> ----- Original Message -----
> From: "Douglas Pauls" <[log in to unmask]>
> To: <[log in to unmask]>
> Sent: Wednesday, October 20, 2010 8:20 PM
> Subject: [TN] Conformal Coating Board Edges
>
>
>> Good afternoon all,
>>
>> I am glad we all appreciate Inge and the time he puts into making this a
>> fun and interesting forum. To sum up: Ditto.
>>
>> I have a question related to conformal coating, a sort of survey. For
>> those of you that conformally coat your assemblies, do you coat the
> edges
>> of the boards? Why or why not?
>>
>> There is an internal debate here and I wanted some other viewpoints
> before
>> offering my own.
>>
>> Doug Pauls
>> Rockwell Collins
>>
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