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September 2010

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Subject:
From:
Steve Gregory <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Steve Gregory <[log in to unmask]>
Date:
Mon, 20 Sep 2010 15:59:13 -0400
Content-Type:
text/plain
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text/plain (133 lines)
Wayne,

I believe it's intent is that when you have a trace between and connecting
two adjacent pads, a bridge between the leads is not a defect.

I've seen it occur on numerous occasions, especially on fine pitch
components when the solder mask has been "window-paned" without a soldermask
dam between the leads. I've sometimes had to include specific comments in my
work instructions that bridges between those leads is not a defect because
it has not been readily apparent that a trace is connecting the pads.

Steve Gregory

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Knapp, Wayne B
Sent: Monday, September 20, 2010 3:11 PM
To: [log in to unmask]
Subject: Re: [TN] Questions related to J-STD-001E

Here is the referenced text from J-STD-001E. I'm not sure why it was
converted to an image.

4.18.2 Solder Connection Defects The following solder connection conditions
shall [D1D2D3] be considered defects:
a. Fractured solder connections.
b. Disturbed solder connections.
c. Cold or rosin solder connections.
d. Solder that violates minimum electrical clearance (e.g., bridges), or
contacts the component body (except as noted in 7.5.7
and 7.5.8).
e. Fails to comply with wetting criteria of 4.18.
f. Solder bridging between connections except when path is present by
design.

Thanks,
Wayne

-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]] 
Sent: Monday, September 20, 2010 12:40 PM
To: [log in to unmask]; Knapp, Wayne B
Cc: [log in to unmask]
Subject: RE: Questions related to J-STD-001E

No image available!!!!

"X"

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Knapp, Wayne B
Sent: Monday, September 20, 2010 12:02 PM
To: [log in to unmask]
Subject: [TN] Questions related to J-STD-001E

I'm a new member and hope that this is the correct forum for questions.  My
question is related to IPC J-STD-001E, Section 4.18.2, Solder Connection
Defects.  In particular, I would like to know how Item "f." is to be
interpreted (See reference below).  Is the intent of item "f."  to,


1)      allow a solder connection within the confines of the solder pads and
connecting solder path as the design allows,
or

2)      does it allow solder "bridging" outside the solder boundaries
(solder pads and connecting solder path) and solder is allowed to come in
contact with the circuit board.

[cid:[log in to unmask]]

It appears that item "f." was not part of the standard in Revision B, but
was added to the standard in Revision C.  With that said, I'm hopeful that
someone in this forum can shed some light on the original intent of Item
"f."

Thanks,
Wayne


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