I don't pretend to be an expert at miniaturisation but there are three 
different criteria which I think have to be taken into account:
- probably the most important is the active component. There are limits 
to the width of features within semiconductors, under which reliability 
starts to fall vertiginously. This can be partially overcome by stacking 
chips to get more features into a given volume.
- then there is the passive component and it is possible that the limit 
here is the ability for insertion machinery to handle them with 
sufficient accuracy of placement, quite apart from the difficulty of 
actually manufacturing these reduced size components
- the third limitation is in the interconnection between the components 
whether they be active or passive. This is the role of the printed or 
hybrid circuit and it is possible that we have not reached the limit 
but, doing so, may increase the costs exponentially.

Then you have to consider the assembly of all three of these criteria 
into something that can be made to work. Over the past 20 years or so 
our industry has passed through a revolution which has allowed extreme 
miniaturisation with reduced costs for the final product. In my opinion, 
it is probable that this state of affairs will come to an end in the 
very near future. Yes, there will be increased miniaturisation but only 
for those applications where it is absolutely essential because prices 
will probably rise rather than descend in order to meet the 
technological parameters.

What I have written here is pure opinion with a little dash of 
speculation. Take it for what it is worth (and that is maybe nothing!). 
As a futurologist my track record has been average, with some mistakes 
and some successes.

Brian

On 14/08/2010 01:07, Sharon Starr wrote:
> Hello TechNetters,
>
> I am new on TechNet and I'm more of business/economics geek than a techie, so I hope you'll bear with me if I ask some obvious questions.  I am developing a study of technology trends in the electronics interconnect industry for IPC.  One of the trends we're looking at is miniaturization.  With nanotechnology coming into play, I'm wondering where the limits are and what roadblocks might be slowing the trend.
>
> So here's my question: apart from end-use requirements, what factors currently limit continued miniaturization in circuitry dimensions?  Do you see solutions to these limiting factors in the works?  Do any of them seem insurmountable?  Your ideas, opinions or predictions will be very helpful.
>
> With thanks,
> Sharon
>
> Sharon Starr
> Director of Market Research
> IPC - Association Connecting Electronics Industries(r)
> 3000 Lakeside Drive
> Suite 309 S
> Bannockburn, IL 60015-1249 USA
> +1 847-597-2817 tel
> +1 847-597-2845 fax
> [log in to unmask]<mailto:[log in to unmask]>
> www.ipc.org<http://www.ipc.org>
>
>
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