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August 2010

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From:
Joyce Koo <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Joyce Koo <[log in to unmask]>
Date:
Fri, 13 Aug 2010 18:27:33 -0400
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http://www.nsti.org/events/NNI/

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Sharon Starr
Sent: Friday, August 13, 2010 6:07 PM
To: [log in to unmask]
Subject: [TN] limits to miniaturization

Hello TechNetters,

I am new on TechNet and I'm more of business/economics geek than a techie, so I hope you'll bear with me if I ask some obvious questions.  I am developing a study of technology trends in the electronics interconnect industry for IPC.  One of the trends we're looking at is miniaturization.  With nanotechnology coming into play, I'm wondering where the limits are and what roadblocks might be slowing the trend.

So here's my question: apart from end-use requirements, what factors currently limit continued miniaturization in circuitry dimensions?  Do you see solutions to these limiting factors in the works?  Do any of them seem insurmountable?  Your ideas, opinions or predictions will be very helpful.

With thanks,
Sharon

Sharon Starr
Director of Market Research
IPC - Association Connecting Electronics Industries(r)
3000 Lakeside Drive
Suite 309 S
Bannockburn, IL 60015-1249 USA
+1 847-597-2817 tel
+1 847-597-2845 fax
[log in to unmask]<mailto:[log in to unmask]>
www.ipc.org<http://www.ipc.org>


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