I agree with Phil. This is an important topic that needs to be addressed
along with other issues that were tabled and not in the C revision.
Dewey

-----Original Message-----
From: IPC-600-6012 [mailto:[log in to unmask]] On Behalf Of Philip M
Henault
Sent: Friday, August 27, 2010 12:42 PM
To: [log in to unmask]
Subject: [IPC-600-6012] Thermal Zone Definition

Now that it's been quiet for almost a day.....

One of the things that this committee left on the shelf when trying to
get 
out Rev C was the issue of properly defining the thermal zone with
respect 
to blind, buried and micro via structures.  I have attached a few photos

provided by Bill Reed to illustrate the concern.  As a committee, we
need 
to address the condition depicted in these photos and apply an
appropriate 
post thermal stress requirement.  If I'm not mistaken, the coupons that 
these photos were taken from were all stressed IAW TM-650, Method 2.6.8 
(10 second solder float @ 550F).  My preference would be to not extend
the 
thermal zone definition below the via structure because I do not want to

compromise minimum dielectric spacing however, I realize that some 
materials may be up to the task.  I know this is on the Agenda for the 
Midwest meeting but, should anyone care to weigh in now it would be 
appreciated. 

 

        Phil


______________________________________________________________________
This email has been scanned by the MessageLabs Email Security System.
For more information please contact helpdesk at x2960 or
[log in to unmask] 
______________________________________________________________________

______________________________________________________________________
This email has been scanned by the MessageLabs Email Security System.
For more information please contact helpdesk at x2960 or [log in to unmask] 
______________________________________________________________________