IPC-600-6012 Archives

August 2010

IPC-600-6012@IPC.ORG

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IPC-600-6012<[log in to unmask]>
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Date:
Fri, 27 Aug 2010 15:41:33 -0400
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"(Combined Forum of D-33a and 7-31a Subcommittees)" <[log in to unmask]>
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From:
Philip M Henault <[log in to unmask]>
X-cc:
William B Reed <[log in to unmask]>
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Now that it's been quiet for almost a day.....

One of the things that this committee left on the shelf when trying to get 
out Rev C was the issue of properly defining the thermal zone with respect 
to blind, buried and micro via structures.  I have attached a few photos 
provided by Bill Reed to illustrate the concern.  As a committee, we need 
to address the condition depicted in these photos and apply an appropriate 
post thermal stress requirement.  If I'm not mistaken, the coupons that 
these photos were taken from were all stressed IAW TM-650, Method 2.6.8 
(10 second solder float @ 550F).  My preference would be to not extend the 
thermal zone definition below the via structure because I do not want to 
compromise minimum dielectric spacing however, I realize that some 
materials may be up to the task.  I know this is on the Agenda for the 
Midwest meeting but, should anyone care to weigh in now it would be 
appreciated. 

 

        Phil


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