Hi dear all,
I don't think the SMT pad is the neck of current carrying capability since it is jointed with device alloy well. the thickness of alloy is more thicker than copper trace. and so the temp rise on smt pad will not be high than cooper trace. i think dedinger should pay more attention to trace carrying capability.
I assumed 10A current for smt pad carrying, it will not cause high temp rise ,and alos it would not lead to peeling off or CTE question according to my present experience.
above are my personal viewpoint, your are welcomed to point it freely.
Best regards!
Jan Chen
> -----Original Message-----
> From: Forrester, Michael (H USA) <[log in to unmask]>
> To: [log in to unmask]
> Sent: Tue, Jul 20, 2010 11:34 am
> Subject: [TN] SMT PAD Current Capability
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> I'm a bit confused on how to calculate the current capability of a SMT
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> pad. We have a 2220 size chip bead that has 8A flowing through it.
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> Our pad geometry is built per IPC specifications but the manufacturers
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> datasheet calls out for a PAD twice the width (part max is 10A).
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> So the question came up, with our current pad geometry (to IPC), what is
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> the current capability? I understand that it is based on the
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> cross sectional area of the copper. The current density of copper is
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> 4.02 A/sq-mm. For a 1 oz copper trace the area is
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> 1.4 mils x trace width. But what do I use for a PAD? I have an width,
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> length, and thickness. For instance I have a SMT pad that
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> is 1.5mm X 6mm using 1 oz copper with multiple traces coming off of the
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> pad. What is the current carring capability of that pad?
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> Or am I thinking about this wrong? Thank you.
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> Best Regards,
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> Michael Forrester
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