Replies below
Bev
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Kane, Amol (349)
Sent: Tuesday, May 04, 2010 7:50 AM
To: [log in to unmask]
Subject: Re: [TN] Question about Voids in Solder Joints
How are the voids being measured..... X-Rays?
Yes
x-sectioning a sample?
Yes
Other method?
No
..I would assume the potential to void will change very easily, with
something as simple as different solderability of a different lot of
components. Are the void measurements taken on 100% of product or some
sample thereof?
Absolutely not.
Amol
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Wenger, George M.
Sent: Monday, May 03, 2010 9:44 PM
To: [log in to unmask]
Subject: Re: [TN] Question about Voids in Solder Joints
Bev,
You're welcome. Sometimes I wish my "others'" were asking to raise the
number. I've got just the opposite. RF designers have taken the
approach if 20% voiding is okay 15% would be better and 7.5% would even
be better still. Part of their thinking has some merit. They are
always increase transistor power levels and using less space and want
increased efficiency so they do need better thermal and electrical
contact. Unfortunately, as a solder assembly person I know that it is
virtually impossible to make a void-free solder joint consistently.
Regards,
George
George M. Wenger
Senior Principal FMA / Reliability Engineer
Andrew Corporation - Wireless Network Solutions
40 Technology Drive, Warren, NJ 07059
(908) 546-4531 Office (732) 309-8964 Mobile
E-mail: [log in to unmask]
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Bev Christian
Sent: Monday, May 03, 2010 8:24 PM
To: [log in to unmask]
Subject: Re: [TN] Question about Voids in Solder Joints
Thanks, George. Most detailed answer yet.
At Nortel we never had a void spec for leaded components either. And, as
I
think I have said on TechNet before, we would find many joints after
pull
testing or cross-sectioning that looked like Swiss cheese, but we never
had
field failures as a result. BUT we were manly concerned about the
possibility of failures due to thermal cycling.
Now I worked for a company where the main concern is customers dropping
their product onto hard edges. We do a lot of work to try and design
and
build products to survive multiple drops in different orientations, but
occasionally a switch is going to come down on a pointed rock or a
customer
is going to rip a charging cable out of a connector at a 45 degree angle
(yikes). These are the things I am talking about. I was leaning
towards
25% for leaded components, so you and I are in the same ball park,
George.
Others have suggested a higher number, but without some encouraging
words in
that direction from fellow TechNetters, I ain't goin' there.
Bev
RIM
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Wenger, George M.
Sent: Monday, May 03, 2010 5:57 PM
To: [log in to unmask]
Subject: Re: [TN] Question about Voids in Solder Joints
Bev,
We're in a similar position to Dave Hillman. We basically follow IPC
standards (where there are standards). We do not have a company
standard
for leaded components. A couple of small voids is okay, more or large
voids
are not. Having said that you'll probably ask how many is a couple and
what
is small and what is large. We don't have a really good answer. Since
we
do a lot of RF power component work we've adopted a voiding
specification
that has worked well for IC packages. They typically use a criteria of
total die attach voids <20% with no single void >5% is okay. We don't
actually measure voids in leaded devices but if we were to see 20%
voiding
in a leaded component solder joint we'd be concerned.
Regards,
George
George M. Wenger
Senior Principal FMA / Reliability Engineer
Andrew Corporation - Wireless Network Solutions
40 Technology Drive, Warren, NJ 07059
(908) 546-4531 Office (732) 309-8964 Mobile
E-mail: [log in to unmask]
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Bev Christian
Sent: Monday, May 03, 2010 3:48 PM
To: [log in to unmask]
Subject: [TN] Question about Voids in Solder Joints
TechNetters,
I was thinking about just putting "Voiding" as the e-mail title, but I
contemplated what I might get in responses and amended my title
accordingly.
My question is the following: do any of your companies have upper limits
on the amount of voiding in SMT solder joints of components that
customers have access to - like connectors and switches? These of
course are leaded components. I am not talking about Pb, but the form
of the interconnect between the component body and the board.
If so, are you willing and can you share?
Bev
RIM
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