Bev,
We're in a similar position to Dave Hillman. We basically follow IPC standards (where there are standards). We do not have a company standard for leaded components. A couple of small voids is okay, more or large voids are not. Having said that you'll probably ask how many is a couple and what is small and what is large. We don't have a really good answer. Since we do a lot of RF power component work we've adopted a voiding specification that has worked well for IC packages. They typically use a criteria of total die attach voids <20% with no single void >5% is okay. We don't actually measure voids in leaded devices but if we were to see 20% voiding in a leaded component solder joint we'd be concerned.
Regards,
George
George M. Wenger
Senior Principal FMA / Reliability Engineer
Andrew Corporation - Wireless Network Solutions
40 Technology Drive, Warren, NJ 07059
(908) 546-4531 Office (732) 309-8964 Mobile
E-mail: [log in to unmask]
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Bev Christian
Sent: Monday, May 03, 2010 3:48 PM
To: [log in to unmask]
Subject: [TN] Question about Voids in Solder Joints
TechNetters,
I was thinking about just putting "Voiding" as the e-mail title, but I
contemplated what I might get in responses and amended my title
accordingly.
My question is the following: do any of your companies have upper limits
on the amount of voiding in SMT solder joints of components that
customers have access to - like connectors and switches? These of
course are leaded components. I am not talking about Pb, but the form
of the interconnect between the component body and the board.
If so, are you willing and can you share?
Bev
RIM
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