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April 2010

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Subject:
Re: Reverse engineering proofing
From:
Bob Landman <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Bob Landman <[log in to unmask]>
Date:
Wed, 7 Apr 2010 20:25:30 -0400
Content-Type:
text/plain
Parts/Attachments:
text/plain (115 lines) 
If we ship to China we remove the chip ID markings.

The FPGAs used should have encrypted internal flash memory such as is  
the case with some Lattice Semi products.

Use an encrypted PLD to decode mpu instructions from rom.

Bob Landman
H&L Instruments,LLC

Sent from my iPhone

On Apr 7, 2010, at 4:00 PM, R Sedlak <[log in to unmask]> wrote:

> Consider mis-labeling of component chip packages !??!
> Rudy Sedlak
> RD Chemical Company
>
> --- On Wed, 4/7/10, Ioan Tempea <[log in to unmask]> wrote:
>
> From: Ioan Tempea <[log in to unmask]>
> Subject: [TN] Reverse engineering proofing
> To: [log in to unmask]
> Date: Wednesday, April 7, 2010, 11:54 AM
>
> Dear Technos,
>
>
>
> We want to prevent reverse engineering of a few products that we  
> assemble, as much as we can. What are the proofing methods you use?
>
>
>
> An idea that came up was to cover the surface of the cards with  
> potting. If this makes sense, what substance to use?
>
>
>
> Thanks,
>
>
>
> Ioan Tempea, ing.
> Ingénieur Principal de Fabrication / Senior Manufacturing Engineer
> T | 450.967.7100 ext.244
> E | [log in to unmask] <mailto:[log in to unmask]>
> W | www.digico.cc <http://www.digico.cc/>
>
>
> N'imprimer que si nécessaire - Print only if you must
>
>
>
>
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