I don't use a low temp profile with a populated PCB. However if you take the PCBA above the solder reflow temp then I the SJs would be no problem... The only problem is that now you probably have the same conditions that generated the warped PCBA in the first place... However if you are attentive to the thermal profile you might be able to eliminate some of the PCBA warp initial induced by the wrong profile by the use of a little different thermal zone biasing...
Paul Edwards
Surface Art Engineering
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Nowland, Russell Howard (Russell)
Sent: Monday, February 01, 2010 12:41 PM
To: [log in to unmask]
Subject: Re: [TN] IPC-7721 LESSONS LEARNED
After reading the original question I had to pull the spec and read it. I could see doing this for bare boards but the spec eludes that you can also do this on a populated board. Since you are forcing a board flat with components on it is anyone concerned about cracking components or solder joints here?
The spec also states the bake temperature is 125 C but what if you are using material with a Tg of 170C?
I have never tried this and I am a little curious.
Russell Nowland
Alcatel-Lucent
Advanced Manufacturing Engineer
Address: 14000 Quail Spring Parkway, Suite 300
Oklahoma City, OK 73134
email: [log in to unmask]
Desk: 405-302-1660
Cell: 405-203-0034
Fax: 405-302-1622
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Steven Creswick
Sent: Monday, February 01, 2010 2:03 PM
To: [log in to unmask]
Subject: Re: [TN] IPC-7721 LESSONS LEARNED
Steve,
From an outsiders [microelectronics oriented] point of view it would seem
that the layer to layer copper coverage variance would have the most to do
with warpage. Like you say, you could force it flat for P&P, but the sucker
is most certain to warp again during reflow.
I bet that is when you beat on the layout guys!
Glad you are feeling a bit better!
Steve C
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Steve Gregory
Sent: Monday, February 01, 2010 2:50 PM
To: [log in to unmask]
Subject: Re: [TN] IPC-7721 LESSONS LEARNED
Lee,
In my experience of straightening warped/twisted bare board, I've done it by
putting solder bars on top of the board and then baking them like the -7721
says, then cooling them with the bars remaining on top.
The board will be flat for printing and pick and place, but it's been my
experience that most of the time the board will re-warp during reflow.
Steve
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Lee Whiteman
Sent: Monday, February 01, 2010 2:20 PM
To: [log in to unmask]
Subject: Re: [TN] IPC-7721 LESSONS LEARNED
No - These are bare unpopulated boards.
Lee Whiteman, PMP
Senior Member Engineering Staff
L-3 Communications East
Telephone: (856) 338-3508
FAX: (856) 338-2906
E-Mail: [log in to unmask]
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Paul Edwards
Sent: Monday, February 01, 2010 2:19 PM
To: [log in to unmask]
Subject: Re: [TN] IPC-7721 LESSONS LEARNED
Lee,
Are these populated PCBs?
Paul
Paul Edwards
Surface Art Engineering
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Lee Whiteman
Sent: Monday, February 01, 2010 7:07 AM
To: [log in to unmask]
Subject: [TN] IPC-7721 LESSONS LEARNED
We got some boards that are warped (bent & twisted that exceeded the
flatness requirements per the J-STD-001). IPC-7721 has a repair
procedure for warped boards. I'm getting a copy of IPC-7721 so I can
familiarize myself with the process. In the meantime, does anyone have
any "lessons learned" from using this procedure?
THANKS.
Lee Whiteman, PMP
Senior Member Engineering Staff
L-3 Communications East
Telephone: (856) 338-3508
FAX: (856) 338-2906
E-Mail: [log in to unmask]
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