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January 2010

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Subject:
From:
Werner Engelmaier <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Werner Engelmaier <[log in to unmask]>
Date:
Tue, 5 Jan 2010 12:38:15 -0500
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 Hi Bob,
The barrel thickness variation, also called 'dog-boning,' depends on your plating chemistry and plating conditions, which determine the 'throwing power' of a plating process. most modern chemistries properly used are capable of very uniform plating thicknesses even for quite large aspect ratio holes. Non-uniform plating thickness also means a decline in the physical properties [strength, ductility] of the ED-copper near the PCB center.
Werner

 


 

 

-----Original Message-----
From: Robert Kondner <[log in to unmask]>
To: [log in to unmask]
Sent: Tue, Jan 5, 2010 11:58 am
Subject: Re: [TN] Thermally Conductive & Plated Via Fill


Joyce,

 When plating a hole with extra copper what does the distribution look like
along the hole?

 I would imagine the section of the hole near the board surface would have a
thicker wall?

 Has anyone seen cross sections that show this barrel thickness variation?
If any?

Thanks,
Bob Kondner

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Joyce Koo
Sent: Tuesday, January 05, 2010 1:07 AM
To: [log in to unmask]
Subject: Re: [TN] Thermally Conductive & Plated Via Fill

In a model, the possibility is not limited by mfg matrix, that is why all
the questions come up.  Someone need to work in the fab for 6 month before
start modeling.  I mean hands dirty type, not power point visitor only.  My
2 cents. 
--------------------------
Sent using BlackBerry


----- Original Message -----
From: TechNet <[log in to unmask]>
To: [log in to unmask] <[log in to unmask]>
Sent: Mon Jan 04 22:28:00 2010
Subject: Re: [TN] Thermally Conductive & Plated Via Fill

There was a question earlier about why the big 
added expense for thicker annular copper.

Thicker surface copper comes along with thicker 
hole wall copper. Significant added cost comes 
with the added processes for keeping the 
outerlayer copper from getting thicker than normal.

Outerlayer feature sizes on most modern designs 
don't yield well with thicker copper (not to 
mention making for soldermask challenges).

Many other vias on the pwb aren't going to like 
heavy copper. Via copper thickness variations 
increase along with total copper thickness. 
Smaller vias might plate shut or almost shut 
leading to problems with entrapment or popcorning 
during reflow. Critical PTH's for pressfit 
connectors or thru-hole soldered pins need less 
copper or tighter tolerance than will be acheived with a heavy copper
plating.

The common solution is to drill and plate the 
heavy copper vias first using a button plate and 
planarization. Then drill and plate the rest of the vias.

At 06:04 PM 1/4/2010, Brooks, Bill wrote:
>Actually in this previous example I changed the 
>thickness of the board to .0625 because that is 
>the most common.... however I think in our case 
>we were using the .008 mil via as the target 
>size so we went with a .031 thick board because 
>of the aspect ratio of the finished hole to make it more manufacturable...
>
>So when I just now changed the board thickness 
>to .031 I get the following results...
>
>.014 drilled hole... 2 oz copper, .031 thick = 7.65 °C/W
>With solder fill = 7.53 °C/W
>
>.011 drilled hole... 1 oz copper, .031 thick = 17.71 °C/W
>With solder fill = 17.08 °C/W
>
>The numbers are more representative of a real example...
>
>So if you used an array of them they would act 
>like resistors in parallel.. you could reduce 
>the thermal resistance from a device soldered to 
>the top to the bottom ... note the difference in 
>the thicker wall plating in the vias...
>
>
>
>Bill Brooks | Datron World Communications, Inc.
>PCB Designer/Engineer | Office: 760-602-7004| 
>Fax: 760-597-3777 | [log in to unmask]
>1808 Aston Avenue, Suite 230, Carlsbad, CA 92008 | www.dtwc.com
>
>Performance You Require. Value You ExpectTM
>
>
>-----Original Message-----
>From: TechNet [mailto:[log in to unmask]] On Behalf Of Brooks, Bill
>Sent: Monday, January 04, 2010 5:42 PM
>To: [log in to unmask]
>Subject: Re: [TN] Thermally Conductive & Plated Via Fill
>
>Correction... this was a model of a .008 mil via finished size...
>The *drill hole* was .014 with 1 oz or 2 oz copper in it...
>
>Told ya I was human.. :)
>
>
>Bill Brooks | Datron World Communications, Inc.
>PCB Designer/Engineer | Office: 760-602-7004| 
>Fax: 760-597-3777 | [log in to unmask]
>1808 Aston Avenue, Suite 230, Carlsbad, CA 92008 | www.dtwc.com
>
>Performance You Require. Value You ExpectTM
>
>
>-----Original Message-----
>From: TechNet [mailto:[log in to unmask]] On Behalf Of Brooks, Bill
>Sent: Monday, January 04, 2010 4:39 PM
>To: [log in to unmask]
>Subject: Re: [TN] Thermally Conductive & Plated Via Fill
>
>Thanks for that... I called my M.E. who does the 
>thermal calcs on the boards and he told me the 
>same... :P (My mistake... that's what I get for 
>opening my big mouth without having reference 
>info available to speak to.  LOL) Ah the 
>difficulty with Assuming... it's okay... I have 
>messed up before and I quite probably will 
>again. [HUMAN... doh...] But I'll keep trying to get it right. :)
>
>
>At any rate... here's something to consider...
>
>He put a spreadsheet together to model the vias 
>we were using with and w/out solder fill and the 
>difference is almost negligible...
>
>A standard 14 mil via in an .062 thick board 
>with 1oz copper in the barrel and air in the 
>middle has a calculated thermal resistance of 26.92 °C/W
>The same via filled with solder has a thermal resistance of 25.57 °C/W
>
>If you increase the thickness of the copper in 
>the barrel to 2oz only... everything else being 
>the same... the thermal resistance with air in the hole goes to 15.3 °C/W
>And filled with solder the thermal resistance goes to 15.06 °C/W
>
>That's why I say the solder doesn't make much 
>difference... If anyone needs to look at the spreadsheet I can supply it...
>
>Who knows maybe he made a mistake but it's not 
>likely... he did the calcs on a complete complex 
>system and it predicted the results accurately 
>within a few degrees of the proto we built. So 
>his numbers are usually pretty good.
>
>Anyway... interesting discussion.
>
>
>Bill Brooks | Datron World Communications, Inc.
>PCB Designer/Engineer | Office: 760-602-7004| 
>Fax: 760-597-3777 | [log in to unmask]
>1808 Aston Avenue, Suite 230, Carlsbad, CA 92008 | www.dtwc.com
>
>Performance You Require. Value You ExpectTM
>
>
>-----Original Message-----
>From: Robert Kondner [mailto:[log in to unmask]]
>Sent: Monday, January 04, 2010 3:25 PM
>To: Brooks, Bill
>Subject: RE: [TN] Thermally Conductive & Plated Via Fill
>
>Bill,
>
>  Air is not 1. Air is about .027.
>
>  See: http://www.engineeringtoolbox.com/thermal-conductivity-d_429.html
>
>  The CB-100 is specified at 5.2.
>
>  Note that any air gap is bad news.
>
>Bob Kondner
>
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