Pete,

I agree with Randy that this is not your typical CAF failure.  We also
recommend Vertical microsections and then SEM to identify how/if the copper
is connected to the fibers.

You mentioned cracks/delamination in the 7/8 layer.  This may be the
"significant" issue here. A failure happening this quickly that is
Electrochemical in nature would need some serious ionic contamination and a
clear path to get the process accelerated to the level you are seeing (this
is hard to do on the surface with anything other than a water drop). Were
there any other interesting ions found in the EDX scans that would point to
a cause of the acceleration you are seeing?

I would assume that 7/8 is the center of the multilayer.  I would check the
boards for "degree of cure" as that may be where you delamination/cracking
is coming from.  It is also appears in the SEM photo that the delamination
was adhesive in nature as the fibers are clearly visible (although the
machining may have contributed to this).  Is there Carbon/Oxygen present on
the exposed fibers (an indicator of a layer of resin present) or is it just
Silicon and Glass Fiber Trace Elements in the EDX scan?

Unfortunately there are more questions than answers Pete....

Best Regards,

Bob Neves
Chairman/CTO
Microtek Laboratories
[log in to unmask]
www.TheTestLab.com 
Anaheim, CA
+1 (714) 999-1616
Changzhou, China
+86 (519) 8548-7805




On 12/1/09 7:01 AM, "[log in to unmask]" <[log in to unmask]> wrote:

> All:
> 
> A few weeks ago I sent out a question to the community - Why do I have
> low resistance isolation between isolated circuits.  The general answer
> that came back was  - I have CAF.  Fast forward a couple weeks and I
> have more information - I don't think I have a CAF issue - I may have
> invented something new.
> 
> Quick description: 14 layer, polyimide material.  Single lamination
> cycle (no blind/buried vias), .093" thick.  We have identified the
> shorts to be created between layers 7/8.  I have gone as far as milling
> down through layers 1 - 7 and evaluated the entire board.  There are no
> anomalies until we get to the dielectric layer between 7/8.  There are
> cracks/delaminations between holes in the BGA socket area but nowhere
> else on the board.
> 
> Pictures of what we are seeing are below.
> 
> The first horizontal section shows cracks/delamination - the resistance
> measured 150 ohms (or so), That coupon was sent out for analysis.  We
> received back some SEM photos with an explanation that the copper plated
> from one hole to the other.  One hole acted as a cathode, the other an
> anode and the moisture in the board was the carrier. We in essence
> created a mini plating cell.  In these pictures you'll see copper
> plating actually plating around the fiberglass bundles.  The voltage on
> this device is 3.3 volts.  The shorts showed up in hours of operation
> (maybe up to 20- 40 hours).  The boards were not baked prior to
> assembly.  The boards do get temperature cycled (-53 - +54 C) but this
> short will appear with just 0 or 1 cycle.  (I have 4 boards with no
> thermal cycles other than assembly).
> 
> Any suggestions on what I actually have?
> 
> Thanks,
> Pete
> 
> 
> 
> 
> Horizontal Cross section
>  <<Picture (Device Independent Bitmap)>>
> 
> You can see three areas with delamination - all three areas have reduced
> resistance.
> 
> We had this section evaluated with SEM/EDS which revealed:
> 
>  <<Picture (Device Independent Bitmap)>>
> 
> Higher magnification of the same location:
>  <<Picture (Device Independent Bitmap)>>
> 
> The light areas are identified as copper.
> 
>  <<Picture (Device Independent Bitmap)>>
> New sample - horzonatal view of copper connecting holes.
> 
> Pete Menuez 
> Supplier Quality Engineering Manager
> L-3 Communications Cincinnati Electronics
> 7500 Innovation Way
> Mason, Ohio 45040
> [log in to unmask]
> 513-573-6401 Voice
> 513-573-6767 Fax 
> 
> 


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