Thank you very much to all for your responses.  I guess I can summarize that there is no specification within IPC describing the amount of solder voids, also from the experience of some of you the presence of these voids does not make any difference in terms of shear testing.

Now to further expand my question and if you consider the anatomy of a chip component solder joint connection, where we would break this solder joint in two parts: The portion of the connection between the pad and the terminal and the actual meniscus that is formed on the termination of the chip.  In which of this two parts would the voids be more critical?  

I believe that the strength of the solder joint connection is provided by the meniscus portion.  This is the reason why, this characteristic is relevant in IPC-610 (8.2.2.6).  What are your thoughts about this?

Saludos Cordiales / Best Regards 
Alejandro A. Domínguez 
Robert Bosch Corporation
> _____________________________________________ 
> From: 	Dominguez Alejandro (JuP1/TEF8)  
> Sent:	Saturday, November 07, 2009 8:40 AM
> To:	[log in to unmask]
> Subject:	Solder Voids in Chip Components
> 
> Hello,
> 
> Does anybody know if there is an IPC specification that describes the amount of solder voids allowed in a chip component solder joint?  The IPC-A-610 Rev D is specific describing the % of voids allowed for BGA's solder joints (<25%) only but not for any other type of components.     
> 
> Saludos Cordiales / Best Regards 
> Alejandro A. Domínguez 
> Robert Bosch Corporation
> 
> 

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