Inge,
That was an interesting comment. Any idea on the maximum allows load on a
single (say .5mm) BGA ball in a cycled environment.
I have never seen this for soldered connection but I would expect it to be
somewhere. Can anyone suggest some good reading?
Bob Kondner
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Inge
Sent: Monday, November 30, 2009 4:15 PM
To: [log in to unmask]
Subject: Re: [TN] BGAs & Conformal Coating
Doug,
how can that be possible? When temperature rises, the coating ought to
soften and should expand even horisontally, and when at lower temperatures,
the coating should crimp. The only way I can see is if you have the
situation of a closed in liquid, which one cannot be compressed.
BGAs use to be very hard to rip from the board. I measured some 350 kg force
necessary to pull off a very large BGA.
Inge
----- Original Message -----
From: "Douglas Pauls" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Monday, November 30, 2009 2:29 PM
Subject: Re: [TN] BGAs & Conformal Coating
Good morning Juan,
I suspect that Xilinx wants you do do a thermal cycle study on solder
joint reliability when conformal coating gets under the BGA. The stresses
brought about by a mismatches in the coefficient of thermal expansion
(CTE) can rip a BGA off the board and can severely deform the balls.
Hillman and I did such a study here a few years ago. I can share a few
pictures of what happens, if Steve Gregory would be kind enough to forward
his present e-mail address for the photos. Not sure I have the right one.
Doug Pauls
"Juan T. Marugán" <[log in to unmask]>
Sent by: TechNet <[log in to unmask]>
11/26/2009 11:53 AM
Please respond to
TechNet E-Mail Forum <[log in to unmask]>; Please respond to
"Juan T. Marugán" <[log in to unmask]>
To
[log in to unmask]
cc
Subject
[TN] BGAs & Conformal Coating
Hi,
I've read in a Xilinx guide that: "Xilinx has no experience or reliability
data on
flip-chip BGA packages on board after exposure to conformal coating. It is
recommended that the end-user should characterize the board level
reliability
performance of Xilinx packages before production use."
Does anybody know any infomation or study related with this topic?
Thank you.
Juan T. Marugán
Indra Sistemas SA
Espańa
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