Hi Ingemar,

Using reliability testing by thermal cycling we typically see a 50% reduction in cycles to failure in coupons that have been exposed to lead free preconditioning vs. the "as received" cycles to failure. If you consider "as received" cycles to failure your "entitlement" then lead free reduces the entitlement by 50% on well made boards using high performance materials.

We have seen lead free degradation reflected in product that has "weak" microvias. Failures are expressed in assembly and in the field. 

Microvias that are tested robust to 500 cycles tested at 190°C have not been implicated in assembly or field failures to our knowledge. 

In one case microvias that are robust from 500 up to 1000 cycles tested at 150°C produced a 30% failure rate in assembly. That is why we wrote a three way paper with Curtiss Wright, Coretec and PWB Inc (Microvia Reliability - Concerns in a Lead Free Assembly Environment, not the paper to which you referred in your email). We strongly suggest testing microvias at 190°C. All our customers test microvias at 190°C.

This has been a year of microvia problems. I have expressed that in interviews with iconnect 007 at the Las Vegas and Schaumburg IPC shows which are available online. Stacked microvias and microvias stacked on buried vias have been failing in some applications. There are two or three additional failure modes associated the stacked microvia structures. 



Sincerely, 
Paul Reid 

Program Coordinator 
PWB Interconnect Solutions Inc. 
235 Stafford Rd., West, Unit 103 
Nepean, Ontario 
Canada, K2H 9C1 
613 596 4244 ext. 229 
Skype paul_reid_pwb 
[log in to unmask] <mailto:[log in to unmask]> 

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Hernefjord Ingemar
Sent: November 16, 2009 9:22 AM
To: [log in to unmask]
Subject: Re: [TN] Microvia reliability vs Lead free

 


 
Many relationships are described, one of which is a Curtiss-Wright report. They have exposed identical boards to SnPb soldering/repair and compared with same for SACs, and found a significant difference in time to failure. 

                  
                                       1st thermal cycle to failure

					As Received				6 x 230 Celcius			6 x 260 Celcius

Mean						788					443					4



That is a dramatic change in via failures.  We have seen some failures recently on ordinary double sided FR-4 boards, which were exposed to several heat exposures in conjunction with electrical testing. Far from 260 Celcius, think only 125 Celcius. If we got microvia issues with only 125 C, what if we use 260 C (e.g. repeated repair)?

Has anyone seen any signs of via failure due to increased heat exposure in practice?


Inge
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