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October 2009

TGAsia@IPC.ORG

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Subject:
From:
David Bergman <[log in to unmask]>
Reply To:
Asia Committe Task Group Forum <[log in to unmask]>, David Bergman <[log in to unmask]>
Date:
Thu, 29 Oct 2009 01:59:53 -0500
Content-Type:
text/plain
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text/plain (706 lines)
Hi Hui Luo

I think some of this decision would be up to the customer.  But I can tell you that discoloration is acceptable per A-610 as long as performance is not degraded.  Discoloration of solder mask is also allowed.


10.2.8.3 Laminate Conditions - Flexible and
Rigid - Flex Printed Circuitry - Discoloration

Acceptable - Class 1,2,3
* A discolored conductor meets the requirements of dielectric
withstanding voltage, flexural fatigue resistance, bending
resistance, and solder temperature resistance, after being
subjected to the moisture resistance test of 40°C, 40% relative
humidity, 96 hours.

Acceptable - Class 1
* Minimum discoloration.

Defect - Class 1,2,3
* A discolored conductor does not meet the requirements of
dielectric withstanding voltage, flexural fatigue resistance,
bending resistance, or solder temperature resistance, after
being subjected to the moisture resistance test of 40°C,
40% relative humidity, 96 hours.

10.5.1.4 Solder Resist Coating - Discoloration

Acceptable - Class 1,2,3
* Discoloration of the solder resist material.
Defect - Class 1,2,3
* Solder resist does not comply with 10.5.1.1 through
10.5.1.3.
Figure 10-88
10 Printed Circuit Boards and Assemblies

Best regards,
Dave

David W. Bergman   大山人
Vice President, International Relations
IPC - Association Connecting Electronics Industries
3000 Lakeside Drive Suite 309 S Bannockburn, IL 60015-1249 USA
+1 847-597-2840 tel
+1 847-615-5640 fax
+1 847-867-1388 mobile
[log in to unmask]
www.ipc.org

-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Wednesday, October 28, 2009 11:31 PM
To: David Bergman
Cc: Jack Crawford; Jeanne Cooney; Listserv TGAsia; Tom Newton
Subject: RE: [TGAsia] shelve life and storage informations req

Dear David,

As we know the PCB surface will be discolored after soldering process,
especial for OSP and Imersion silver surface finish.
Is this discoloring a defect that we need to specify? The object should be
finished product after final soldering assembly.

Best Regards

HuiLuo
Manufacturing Engineering, MECH
Embedded Computing & Power

Emerson Network Power
Tel:0760-88865196
Email:[log in to unmask]



             David Bergman
             <DavidBergman@ipc
             .org>                                                      To
                                       Hui Luo/AP/Artesyn@ASTEC
             10/27/2009 04:08                                           cc
             PM                        Jack Crawford
                                       <[log in to unmask]>, Jeanne
                                       Cooney <[log in to unmask]>,
                                       Listserv TGAsia
                                       <[log in to unmask]>, Tom
                                       Newton <[log in to unmask]>
                                                                   Subject
                                       RE: [TGAsia] shelve life and
                                       storage informations req













Hi Hui Luo,


See some replies below:


-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Monday, October 26, 2009 9:35 PM
To: David Bergman
Cc: Jack Crawford; Jeanne Cooney; Listserv TGAsia; Tom Newton
Subject: RE: [TGAsia] shelve life and storage informations req


Hi David,


Yes, I am seeking help for dwell time control between SMT and wave
soldering because the idle time will affect our process quality.
According to your item 1,2,3, I still need your further help.





1. For bare PCBs IPC did a study that showed that when held at office
conditions, PCB had no problem with solderability after two years of
storage(it is applicable for all surface finishes? Is the bare board packed

with vacuum package? Is it possible to share the test reports?)
[David Bergman] The report description.  We had reflowed tin lead and
unfused from what I remembered.  We also had OSP.  Since this is older we
really didn't address the lead free coatings.


IPC-TR-462
DESCRIPTION
This document provides conclusions and recommendations for the
effectiveness of different protective coatings and coating application
methods. PWB solderability in typical storage conditions after various time
periods as well as the correlation of time and storage conditions to
thickness and coating characteristics are addressed. Not available in
electronic format. 63 pages. Released October 1987.





2. Regarding moisture: All PCBs absorb moisture to some extent based on the

laminate material.  After baking the board can absorb to equilibrium
relatively quickly 8-16 hours.  So if the board is in a humid environment
it could absorb faster.(We just put the semi-product in workshop condition,

it really will absorb the moisture, but it is not workable to bake all the
boards due to capacity/volume of baking oven limited; also it will bring
many issues if we transfer the PCBA(with SMDs) too much. So do not know
whether IPC will set the recommended procedure for semi-products before the

last soldering process, such as the storage station, dwell time etc.)
[David Bergman] IPC does not have standards activity on in-process
manufacturing since that can inhibit innovation. But if you cannot bake, I
think longer than 8 hours could lead to problems.  I would also worry about
any residues left after SMT and whether you would clean them.





3. If you are stopping between two operations, I would be concerned about
any in process residues on the assembly and the potential for residue
impact on subsequent processes.(We really encountered such comtamination
problem, oxidization problem before and also was complained by HP, but the
effecting cycle of such problem was always long. Also we use no-clean flux,

normally it will not make much residue. BTW, do IPC have some conditional
using for OSP PCB at wave soldering process, sometimes the flux residue
will oxidize the copper and corrode the copper)
[David Bergman] At one time, IPC committees were working on a standard for
OSP that would be similar to immersion silver and immersion Tin.  I don't
see it listed in development anymore.  Maybe Tom Newton can comment on what
happened to this committee.






Best Regards


HuiLuo
Manufacturing Engineering, MECH
Embedded Computing & Power


Emerson Network Power
Tel:0760-88865196
Email:[log in to unmask]






             David Bergman
             <DavidBergman@ipc
             .org>                                                      To
                                       Hui Luo/AP/Artesyn@ASTEC
             10/27/2009 10:08                                           cc
             AM                        Jack Crawford
                                       <[log in to unmask]>, Jeanne
                                       Cooney <[log in to unmask]>,
                                       Listserv TGAsia
                                       <[log in to unmask]>, Tom
                                       Newton <[log in to unmask]>
                                                                   Subject
                                       RE: [TGAsia] shelve life and
                                       storage informations req













Hi Hui Luo





Your reply confused me a little so I would like to try to clarify my
understanding.  At first it seemed that you were looking for storage after
the PCBA was completed the assembly process.  Now it seems to me that you
are asking about conditions of a dwell time between two assembly
operations.  Maybe you can help clarify.  I can tell you the following:





1. For bare PCBs IPC did a study that showed that when held at office
conditions, PCB had no problem with solderability after two years of
storage.





2. Regarding moisture: All PCBs absorb moisture to some extent based on the

laminate material.  After baking the board can absorb to equilibrium
relatively quickly 8-16 hours.  So if the board is in a humid environment
it could absorb faster.





3. If you are stopping between two operations, I would be concerned about
any in process residues on the assembly and the potential for residue
impact on subsequent processes.





Best regards,
Dave





David W. Bergman   大山人
Vice President, International Relations
IPC - Association Connecting Electronics Industries
3000 Lakeside Drive Suite 309 S Bannockburn, IL 60015-1249 USA
+1 847-597-2840 tel
+1 847-615-5640 fax
+1 847-867-1388 mobile
[log in to unmask]
www.ipc.org








-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Monday, October 26, 2009 8:49 PM
To: David Bergman
Cc: Jack Crawford; Jeanne Cooney; Listserv TGAsia; Tom Newton
Subject: RE: [TGAsia] shelve life and storage informations req





Hi David,





Thanks for you prompt feedback! I agree your words that assembly should set


up serious procedure for ESD and we always do that. Why I raise that
question is because there will be many issues brought if the idle time
between SMT and assembly is certain long, such as solderability issue,
delamination issue, solder balling issue...





Per our experience, there will be big risk if the idle time more than 5
days after SMT. Now in Emerson Network Power Group, we would like to set
down this requirement, but first we wish get comment from you.





Best Regards





HuiLuo
Manufacturing Engineering, MECH
Embedded Computing & Power





Emerson Network Power
Tel:0760-88865196
Email:[log in to unmask]









             David Bergman
             <DavidBergman@ipc
             .org>                                                      To
                                       Hui Luo/AP/Artesyn@ASTEC
             10/27/2009 09:27                                           cc
             AM                        Jack Crawford
                                       <[log in to unmask]>, Tom Newton
                                       <[log in to unmask]>, Jeanne
                                       Cooney <[log in to unmask]>,
                                       Listserv TGAsia
                                       <[log in to unmask]>
                                                                   Subject
                                       RE: [TGAsia] shelve life and
                                       storage informations req
















Dear Hui Luo,








I have never seen a document that established this type of requirement.  I
assume the temperature and humidity requirement would be similar to the
PCB.  I assume also there would be more concern about ESD control.












Best regards,
Dave








David W. Bergman   大山人
Vice President, International Relations
IPC - Association Connecting Electronics Industries
3000 Lakeside Drive Suite 309 S Bannockburn, IL 60015-1249 USA
+1 847-597-2840 tel
+1 847-615-5640 fax
+1 847-867-1388 mobile
[log in to unmask]
www.ipc.org











-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: Monday, October 26, 2009 8:03 PM
To: David Bergman
Cc: Jack Crawford; Tom Newton; Jeanne Cooney; Listserv TGAsia
Subject: Fw: [TGAsia] shelve life and storage informations req











Dear David and other IPC officers,








Besides below, can you help to advise is there any documentation to
describe the shelf life/storage condition/handling requirment for the PCBA
after SMT or wave soldering?








Best Regards








HuiLuo
Manufacturing Engineering, MECH
Embedded Computing & Power








Emerson Network Power
Tel:0760-88865196
Email:[log in to unmask]
----- Forwarded by Hui Luo/AP/Artesyn on 10/27/2009 08:57 AM -----









             David Bergman
             <DavidBergman@IPC
             .ORG>                                                      To
                                       [log in to unmask]
             10/22/2009 12:08                                           cc
             PM
                                                                   Subject
                                       Re: [TGAsia] shelve life and
             Please respond to         storage informations req
               Asia Committe
             Task Group Forum
             <[log in to unmask]>;
             Please respond to
               David Bergman
             <DavidBergman@IPC
                   .ORG>















Hi Patricia,








IPC committees are working on IPC-1601 Printed Circuit Board Storage and
Handling Guidelines.  You can get to the draft document at the link noted
below:








http://www.ipc.org/committeedetail.aspx?Committee=D-35











Best regards,
Dave








David W. Bergman   大山人
Vice President, International Relations
IPC - Association Connecting Electronics Industries
3000 Lakeside Drive Suite 309 S Bannockburn, IL 60015-1249 USA
+1 847-597-2840 tel
+1 847-615-5640 fax
+1 847-867-1388 mobile
[log in to unmask]
www.ipc.org








From: TGAsia [mailto:[log in to unmask]] On Behalf Of Patricia Lui
Sent: Wednesday, October 21, 2009 10:06 AM
To: Listserv TGAsia
Subject: [TGAsia] shelve life and storage informations req













 Dear Friends,








 Can anyone advise me are there any documentations which indicates the PCB





 raw material, bareboard or PCBA storage conditions and shelve life.








 Have anyone of you experience PCBA after storage of one year have appear





 via holes failure issues? Anyone have ever encounter or studies in this





 area?








 Hope to have your favourable advise.








 Thanks & Best Regards





 Patricia Lui





 Xuan Technologies.














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