Hi Pradeep,
Unfortunately, all attachments are stripped from the forum submissions—you need to send the pics to me directly.
You do not say anything about the temperatures of HAL and the thermal stress cycles—very important.
From what you say points 2. to 8. are fine; you do not say anything about moisture bake-out. You also did not say anything about the hole diameters and thickness for both the coupons and your PCBs. What does "3 and half cycle (!) of thermal stress" mean?
Seeing the pictures would make things mare clear, but in any case the cause of t your problem is thermal expansion mismatch—we now have to figure out the difference(s) between your coupons and your PCBs.

Werner


 


 

-----Original Message-----
From: mp3 <[log in to unmask]>
To: [log in to unmask]
Sent: Mon, Oct 5, 2009 3:25 am
Subject: [TN] layer separation










Dear all,

We have been coming across a failure lately in few of the production lots, where 
in the outerlayer separates from the barrel after 3 times thermal stress. We 
have been trying to understand the phenomenon, but has not been very successful. 
The microsection image is attached for reference. Can anyone give your inputs on 
this phenomenon. Few details on our current process and some inputs after our 
trials 

1. It happens only in the outer layer and all innerlayers including N-1 layers 
are intact
2. We do plasma desmear followed by a chemical desmear too ( Rohn n Haas)
3. We use Nelco 175 Tg N4000-6=2
0matrl 
4. We use undercut drill bits with no. of hits , a max of 300 / single in stack 
/ with Al clad entry
5. We use glass etch too along with desmear
6. We use laminate construction
7. All innerlayers are 70 microns base copper while the outer layer is 35 micron 
base copper
8. The boards are normal HAL surface finish
9. We did lot of trials and we did 3 and half cycle (!) of thermal stress after 
etching and found the coupons acceptable. But after the HAL, the same panels 
were found defective!

All chemical processes were reviewed and all looks to be within the specified 
limits. Can anybody help us by giving some inputs, whether we are missing out 
anything.

Thanks in advance

regards

pradeep


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-------------------------------
Micropack Ltd
, Bangalore, India


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