John,
Many thanks for your reply, I appreciate your input.
Yes - we know why the soldering is patchy from our lab report. What I was trying to ascertain is when this is encountered are there certain plating conditions or if the plating was poorly controlled could this result in what appears to be a good finish when measured using XRF being intolerant of quite benign heating cycles.
My real problem I suppose is that the PCB's are reputed to have 1uM Sn as plated by the PCB manufacturer and from various papers I have read from chemistry manufacturers and others, this should be more than sufficient to survive 2 non RoHS reflow cycles and this is not the case. Sometimes they do and sometimes they don’t, sometimes 1 PCB in a 2 up panel that is OK and the other may not, this indicates to me significant variation in the solderability. They have both been through the same immersion plating process so ostensibly they should have the same.
Best rgds,
Peter Barton
Senior Process Engineer
ACW Technology Ltd
Dinas Isaf West
Tonypandy
Mid Glamorgan
CF40 1XX
Tel: 01443 425275 (direct)
Fax 02380 484882
[log in to unmask]
-----Original Message-----
From: John Burke [mailto:[log in to unmask]]
Sent: 22 September 2009 18:14
To: 'TechNet E-Mail Forum'; 'Peter Barton'
Subject: RE: [TN] Imm Sn soldering issue.
Firstly, you already know what the problem is - the tin is forming an
intermetallic with the copper due to the acceleration of the IMC formation
reducing the available tin, caused by the first heating cycle. You have a
few options, change the finish, increase the tin thickness, or reduce the
area under the curve (reflow cycle) as the formation follows an arrhenius
equation in terms of growth rate.
On the comment about "islands" of tin in a sea of intermetallics, this is
exactly what you would expect where all of the tin had not been used up.
Reason is a simple one of surface area. The edges of a pad have more surface
area available to heat and so will heat up faster. The corners will run
hotter faster than anywhere else due to the surface area available for
heating, and so the intermettalic formation rate will be faster following
the arrhenious equation.
If you want to check this out I can pretty much guarantee that if you ran
these boards through 3 reflow cycles the "islands would disappear
completely.
Best regards,
John
John Burke
(408) 515 4992
-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Peter Barton
Sent: Tuesday, September 22, 2009 9:33 AM
To: [log in to unmask]
Subject: [TN] Imm Sn soldering issue.
Dear Technetters,
Hopefully there is someone out there who can help me understand a very
specific issue we have using PCB's plated with Imm Sn. namely, non-wetting
of solder to some lands on the second side of population after reflow. We
have an understanding of this surface finish with respect to the assembly
processes. We are careful how we handle the unpopulated PCB's, the PCB's are
shipped directly to the line and are only removed from the manufacturer's
packaging at the point of use. They are not pre-baked and are subjected to 2
relatively benign reflow cycles.
We only ever see the issue on the second side. It occurs on various
component types. When it does occur the solder deposited at the printing
stage is reflowed and is attached to the component termination, favouring
this as more wettable than the PCB land. The problem does not always occur.
The assembly is populated in 2 up panels and we have examples where one
panel has soldered joints across the piece, whilst the other PCB in the same
panel exhibits non wetting in some areas.
The assembly has been profiled with a good distribution of thermocouples on
a sample assembly to confirm a low delta T and the profile itself is right
at the centre of the paste manufacturer's recommendations. We like to have a
good process window.
I am aware that the 2 possible reasons for this condition are (a) thermal
degradation of the finish and (b) possible plating quality issues.
We have dismissed excessive thermal input as these have only been subjected
to 2 non-RoHS thermal cycles and the PCB's are fresh from the manufacturer.
Peak temperatures are only around the 227 deg. C mark. The Sn thickness
specification is 0.8 - 1.2 uM. The applied thickness has been measured using
XRF as a process control and averages 1.0 uM. I am aware that XRF is only a
guide as it cannot segregate out 'available' pure Sn from Sn/Cu
intermetallics.
We have had an independent lab analysis conducted and example lands where
this condition is seen are shown to have very little or no remaining Sn at
the surface, the majority being Sn/Cu intermetallics. Other unpopulated
plated areas have also been subjected to SEM and EDX for comparison and
exhibit what is described as 'islands' of Sn in a sea of Cu/Sn
intermetallics.
We have not had 'virgin' PCB's analysed yet for comparison as it is costly
and we are not sure if we would pick the correct example to look at - it
could be a good one.
For the PCB experts out there out there I have a couple of questions:
1. If the application of Sn is a displacement reaction with the underlying
Cu is there any way that there can be less Sn on some surface areas than
others?
2. Are there other reasons that there could be variation in Sn deposits or
could lead to the 'islands' of Sn as described by our lab that is seen after
thermal processing?
3. Are we missing anything else?
Any questions please feel free to ask - this is causing me the biggest
headache going.
Peter Barton
Senior Process Engineer
ACW Technology Ltd
Dinas Isaf West
Tonypandy
Mid Glamorgan
CF40 1XX
Tel: 01443 425275 (direct)
Fax 02380 484882
[log in to unmask]
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